4-11
Pinout Information
Lattice Semiconductor MachXO Family Data Sheet
LCMXO256 and LCMXO640 Logic Signal Connections: 100 csBGA
LCMXO256 LCMXO640
Ball
Number
Ball
Function Bank
Dual
Function
Differen-
tial
Ball
Number
Ball
Function Bank
Dual
Function
Differen-
tial
B1 PL2A 1 T B1 PL2A 3 T
C1 PL2B 1 C C1 PL2C 3 T
D2 PL3A 1 T D2 PL2B 3 C
D1 PL3B 1 C D1 PL2D 3 C
C2 PL3C 1 T C2 PL3A 3 T
E1 PL3D 1 C E1 PL3B 3 C
E2 PL4A 1 T E2 PL3C 3 T
F1 PL4B 1 C F1 PL3D 3 C
F2 PL5A 1 T F2 PL4A 3
G2 PL5B 1 C G2 PL4C 3 T
H1 GNDIO1 1 H1 GNDIO3 3
H2 PL5C 1 T H2 PL4D 3 C
J1 PL5D 1 GSRN C J1 PL5B 3 GSRN
J2 PL6A 1 T J2 PL7B 3
K1 PL6B 1 TSALL C K1 PL8C 3 TSALL T
K2 PL7A 1 T K2 PL8D 3 C
L1 PL7B 1 C L1 PL9A 3
L2 PL7C 1 T L2 PL9C 3
M1 PL7D 1 C M1 PL10A 3
M2 PL8A 1 T M2 PL10C 3
N1 PL8B 1 C N1 PL11A 3
M3 PL9A 1 T M3 PL11C 3
N2 GNDIO1 1 N2 GNDIO3 3
P2 TMS 1 TMS P2 TMS 2 TMS
P3 PL9B 1 C P3 PB2C 2
N4 TCK 1 TCK N4 TCK 2 TCK
P4 PB2A 1 T P4 VCCIO2 2
N3 PB2B 1 C N3 GNDIO2 2
P5 TDO 1 TDO P5 TDO 2 TDO
N5 PB2C 1 T N5 PB4C 2
P6 TDI 1 TDI P6 TDI 2 TDI
N6 PB2D 1 C N6 PB4E 2
P7 VCC - P7 VCC -
N7 PB3A 1 PCLK1_1** T N7 PB5B 2 PCLK2_1**
P8 PB3B 1 C P8 PB5D 2
N8 PB3C 1 PCLK1_0** T N8 PB6B 2 PCLK2_0**
P9 PB3D 1 C P9 PB6C 2
N10 GNDIO1 1 N10 GNDIO2 2
P11 PB4A 1 T P11 PB8B 2
N11 PB4B 1 C N11 PB8C 2 T
P12 PB4C 1 T P12 PB8D 2 C
N12 PB4D 1 C N12 PB9A 2
