2-18
Architecture
Lattice Semiconductor MachXO Family Data Sheet
Table 2-10. Supported Output Standards
sysIO Buffer Banks
The number of Banks vary between the devices of this family. Eight Banks surround the two larger devices, the
MachXO1200 and MachXO2280 (two Banks per side). The MachXO640 has four Banks (one Bank per side). The
smallest member of this family, the MachXO256, has only two Banks.
Each sysIO buffer Bank is capable of supporting multiple I/O standards. Each Bank has its own I/O supply voltage
(V
CCIO
) which allows it to be completely independent from the other Banks. Figure 2-18, Figure 2-18, Figure 2-20
and Figure 2-21 shows the sysIO Banks and their associated supplies for all devices.
Output Standard Drive V
CCIO
(Typ.)
Single-ended Interfaces
LVTTL 4mA, 8mA, 12mA, 16mA 3.3
LVCMOS33 4mA, 8mA, 12mA, 14mA 3.3
LVCMOS25 4mA, 8mA, 12mA, 14mA 2.5
LVCMOS18 4mA, 8mA, 12mA, 14mA 1.8
LVCMOS15 4mA, 8mA 1.5
LVCMOS12 2mA, 6mA 1.2
LVCMOS33, Open Drain 4mA, 8mA, 12mA, 14mA —
LVCMOS25, Open Drain 4mA, 8mA, 12mA, 14mA —
LVCMOS18, Open Drain 4mA, 8mA, 12mA, 14mA —
LVCMOS15, Open Drain 4mA, 8mA —
LVCMOS12, Open Drain 2mA, 6mA —
PCI33
3
N/A 3.3
Differential Interfaces
LVDS
1, 2
N/A 2.5
BLVDS, RSDS
2
N/A 2.5
LVPECL
2
N/A 3.3
1. MachXO1200 and MachXO2280 devices have dedicated LVDS buffers.
2. These interfaces can be emulated with external resistors in all devices.
3. Top Banks of MachXO1200 and MachXO2280 devices only.
