L6995
6/25
1 DEVICE DESCRIPTION
1.1 Constan t On Time PWM topology
Figu re 2. Lo op b lo ck sc hem atic dia gr a m
The device implements a Constant On Time control scheme, where the Ton is the high side MOSFET on time
duration forced by the one-shot generator. The on time is directly proportional to VSENSE pin voltage and in-
verse to OSC pin voltage as in Eq1:
Eq 1
where K
OSC
= 250ns and
τ
is the internal propagation delay time (typ. 70ns). The system imposes in steady
state a minimum on time corresponding to V
OSC
= 2V. In fact if the V
OSC
voltage increases above 2V the cor-
responding Ton will not decrease. Connecting the OSC pin to a voltage partition from V
IN
to G ND, it al lo ws a
steady-state switching frequency F
SW
independent of V
IN
. It results:
Eq 2
where
Eq 3
Eq 4
The above equations allo w setting the frequency divide r ratio
α
OSC
once output volt age has been set; note that
such equations hold only if V
OSC
<2V. Further the Eq2 show s how the system h as a sw itching frequenc y ideall y
independent fr om the i nput voltage. The delay introduces a light dependenc e from V
IN
. A minimum off- time con-
strain of about 580ns is intr oduced in order to assure the boot capacitor charge and to limit the switching fre-
Q
Vsense
R3
R4
R2
R1
R
S
Vout
Vin
HGATE
LGATE
Q
OSC
FB
Vref
HS
LS
DS
PWM comparator
FFSR
One-shot generator
-
+
T
ON
K
OSC
V
SENSE
V
OSC
--------------------- -
τ+=
f
SW
V
OUT
V
IN
-------------- -
1
T
ON
-----------
α
OS C
α
OUT
--------------
1
K
OSC
---------------
α
OSC
→ f
SW
K
OSC
α
OUT
== =
α
OSC
V
OSC
V
IN
---------------
R
2
R
2
R
1
+
--------------------==
α
OUT
V
FB
V
OUT
-------------- -
R
4
R
3
R
4
+
--------------------==
