DATASHEET
TRIPLE PLL FIELD PROGRAMMABLE SS VERSACLOCK SYNTHESIZER ICS345
IDT™ / ICS™
TRIPLE PLL FIELD PROGRAMMABLE SS VERSACLOCK SYNTHESIZER 1
ICS345 REV K 110207
Description
The ICS345 field programmable clock synthesizer
generates up to nine high-quality, high-frequency clock
outputs including multiple reference clocks from a
low-frequency crystal or clock input. It is designed to
replace crystals and crystal oscillators in most electronic
systems.
Using IDT’s VersaClock
TM
software to configure PLLs and
outputs, the ICS345 contains a One-Time Programmable
(OTP) ROM to allow field programmability. Programming
f eatures include ei ght selectab le configur ation regist ers, up
to two sets of fou r low-skew outputs, and opt ional Spread
Spectrum outputs.
Using Phase-Locked Loop (PLL) techniques, the device
runs from a standard fundamental mode, inexpensive
crystal, or clock. It can replace multiple cr y stals and
oscillators, saving board space and cost.
The ICS345 is also availab le in factory programmed custom
versions for high-volume applications.
Features
• Packaged as 20-pin SSOP (QSOP)
• Spread spectrum capability
• Eight addressable register s
• Replaces multiple crystals and oscillators
• Output frequencies up to 200 MHz at 3.3 V
• Input crystal frequency of 5 to 27 MHz
• Input clock frequency of 2 to 50 MHz
• Up to nine reference outputs
• Up to two sets of four low-skew outputs
• Operating voltages of 3.3 V
• Advanced, low-power CMOS process
• For one ou tp ut clock, use the ICS341 . For two output
clocks, see the ICS342. For three output clocks, see the
ICS343. For more than three outputs, see the ICS345 or
ICS348.
• Availab le in Pb (lead) free packaging
Block Diagram
Crystal
Oscillator
PLL1 with
Spread
Spectrum
GND
2
3
VDD
PDTS
PLL2
PLL3
Divide
Logic
and
Output
Enable
Control
S2:S0
CLK1
CLK9
CLK8
CLK7
CLK6
CLK5
CLK4
CLK3
CLK2
3
OTP
ROM
with
PLL
Values
X2
Crystal or
clock input
E x tern a l ca pa c itors are
required with a crystal input.
X1/ICLK
