14.0 Instruction Set (Continued)
INC A INCrement A A
←
A+1
DEC A DECrement A A
←
A−1
LAID Load A InDirect from ROM A
←
ROM (PU,A)
DCOR A Decimal CORrect A A
←
BCD correction of A (follows ADC, SUBC)
RRC A Rotate A Right thru C C
→
A7
→
…
→
A0
→
C
RLC A Rotate A Left thru C C
←
A7
←
…
←
A0
←
C, HC
←
A0
SWAP A SWAP nibbles of A A7…A4
↔
A3…A0
SC Set C C
←
1, HC
←
1
RC Reset C C
←
0, HC
←
0
IFC IF C IF C is true, do next instruction
IFNC IF Not C If C is not true, do next instruction
POP A POP the stack into A SP
←
SP + 1, A
←
[SP]
PUSH A PUSH A onto the stack [SP]
←
A, SP
←
SP − 1
VIS Vector to Interrupt Service Routine PU
←
[VU], PL
←
[VL]
JMPL Addr. Jump absolute Long PC
←
ii (ii = 15 bits, 0 to 32k)
JMP Addr. Jump absolute PC9…0
←
i (i = 12 bits)
JP Disp. Jump relative short PC
←
PC+r(ris−31to+32, except 1)
JSRL Addr. Jump SubRoutine Long [SP]
←
PL, [SP−1]
←
PU,SP−2, PC
←
ii
JSR Addr. Jump SubRoutine [SP]
←
PL, [SP−1]
←
PU,SP−2, PC9…0
←
i
JID Jump InDirect PL
←
ROM (PU,A)
RET RETurn from subroutine SP + 2, PL
←
[SP], PU
←
[SP−1]
RETSK RETurn and SKip SP + 2, PL
←
[SP],PU
←
[SP−1],
skip next instruction
RETI RETurn from Interrupt SP + 2, PL
←
[SP],PU
←
[SP−1],GIE
←
1
INTR Generate an Interrupt [SP]
←
PL, [SP−1]
←
PU, SP−2, PC
←
0FF
NOP No OPeration PC
←
PC+1
COP8SG Family
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