6
E to Output t
PLH,
t
PHL
C
L
= 50pF 2 - - 120 - 150 - 180 ns
4.5 - - 24 - 30 - 36 ns
C
L
=15pF 5 - 9 - - - - - ns
C
L
= 50pF 6 - - 20 - 26 - 30 ns
Output Transition Time
(Figure 1)
t
TLH
,t
THL
C
L
= 50pF 2 - - 75 - 95 - 110 ns
4.5 - - 15 - 19 - 22 ns
6 - - 13 - 16 - 19 ns
Input Capacitance C
IN
C
L
= 50pF - - - 10 - 10 - 10 pF
Power Dissipation Capacitance
(Notes 3, 4)
C
PD
C
L
=15pF 5 - 22 - - - - - pF
HCT TYPES
Propagation Delay (Figure 1) t
PLH,
t
PHL
C
L
= 50pF 4.5 - - 34 - 42 - 51 ns
An to Output C
L
=15pF 5 - 14 - - - - - ns
Bn to Output t
PLH,
t
PHL
C
L
= 50pF 4.5 - - 34 - 42 - 51 ns
C
L
=15pF 5 - 14 - - - - - ns
E to Output t
PLH,
t
PHL
C
L
= 50pF 4.5 - - 24 - 30 - 36 ns
C
L
=15pF 5 - 9 - - - - - ns
Output Transition Time
(Figure 1)
t
TLH
,t
THL
C
L
= 50pF 4.5 - - 15 - 19 - 22 ns
Input Capacitance C
IN
C
L
= 50pF - - - 10 - 10 - 10 pF
Power Dissipation Capacitance
(Notes 3, 4)
C
PD
C
L
=15pF 5 - 22 - - - - - pF
NOTES:
3. C
PD
is used to determine the dynamic power consumption, per gate.
4. P
D
= V
CC
2
f
i
(C
PD
+ C
L
) where f
i
= Input Frequency, C
L
= Output Load Capacitance, V
CC
= Supply Voltage.
Switching Specifications Input t
r
, t
f
= 6ns (Continued)
PARAMETER SYMBOL
TEST
CONDITIONS
V
CC
(V)
25
o
C -40
o
C TO 85
o
C -55
o
C T O 125
o
C
UNITSMIN TYP MAX MIN MAX MIN MAX
Test Circuit and Waveform
FIGURE 1. PROPAGATION DELAY AMD TRANSITION TIMES
t
r
= 6ns
OUTPUT Y
t
f
= 6ns
90%
V
S
10%
V
S
t
TLH
ANY INPUT
A OR B
INPUT LEVEL
GND
t
PLH
t
PHL
t
THL
CD54HC688, CD74HC688, CD54HCT688, CD74HCT688