7
8011KS–AVR–09/08
ATmega164P/324P/644P
2.3.7 RESET
Reset input. A low level on this pin for longer than the minimum pulse length will gen erate a
reset, even if the clock is not running. The minimum pulse length is given in ”System and Reset
Characteristics” on page 332. Shorter pulses are not guaranteed to generate a re set.
2.3.8 XTAL1
Input to the inverting Oscillator amplifier and input to the internal clock operating circuit.
2.3.9 XTAL2
Output from the inverting Oscillator amplifier.
2.3.10 AVCC
AVCC is the supply voltage pin for Port A and the Analog-to-d igital Conver ter. I t should b e exte r-
nally connected to V
CC
, even if the ADC is not used. If the ADC is us ed, it should be connec ted
to V
CC
through a low-pass filter.
2.3.11 AREF
This is the analog reference pin for the Analog-to-digital Converter.
3. Resources
A comprehensive set of development tools, application note s and datasheetsare available for
download on http://www.atmel.com/avr.
4. Data Retention
Reliability Qualification results show that the projected data retention failure rate is much less
than 1 PPM over 20 years at 85°C or 100 years at 25°C.
