6
8011KS–AVR–09/08
ATmega164P/324P/644P
2.3 Pin Descriptions
2.3.1 VCC
Digital supply voltage.
2.3.2 GND
Ground.
2.3.3 Port A (PA7:PA0)
Port A serves as analog inputs to the Analog-to-digital Co nverter.
Port A also serves as an 8-bit bi-directional I/O port with internal pull-up resistors (selected for
each bit). The Port A output buffers have symmetrical drive characteristics with both high sink
and source capability. As inputs, Port A pins that are externally pulled low will source current if
the pull-up resistor s are activated. The Por t A pins are tri-stated when a reset condition becomes
active, even if the clock is not running.
Port A also serves the functions of various special features of the ATmega164P/324P/644P as
listed on page 81.
2.3.4 Port B (PB7:PB0)
Port B is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The
Port B output buffers have symmetrical drive characteristics with both high sink and source
capability. As inputs, Port B pins that are externally pulled low will source current if the pull-up
resistors are activated. Th e Port B pins are tri-stated when a reset co ndition becomes active,
even if the clock is not running.
Port B also serves the functions of various special features of the ATmega164P/324P/644P as
listed on page 83.
2.3.5 Port C (PC7:PC0)
Port C is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The
Port C output buffers have symmetrical drive characteristics with both hig h sink and source
capability. As inputs, Port C pins that are externally pulled low will source current if the pull-up
resistors are activated. The Port C pins are tri-stated when a reset condition becomes active,
even if the clock is not running.
Port C also serves the functions of the JTAG interface, along with special features of the
ATmega164P/324P/644P as listed on page 86.
2.3.6 Port D (PD7:PD0)
Port D is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The
Port D output buffers have symmetrical drive characteristics with both hig h sink and source
capability. As inputs, Port D pins that are externally pulled low will source current if the pull-up
resistors are activated. The Port D pins are tri-stated when a reset condition becomes active,
even if the clock is not running.
Port D also serves the functions of various special features of the ATmega164P/324P/644P as
listed on page 88.
