AS7C3364PFD32B
AS7C3364PFD36B
®
1/31/05; v.1.1 Alliance Semiconductor P. 12 of 19
Timing waveform of write cycle
Note: Ý = XOR when LBO = high/no connect; Ý = ADD when LBO = low.
t
CYC
t
CL
t
ADSPS
t
ADSPH
t
ADSCS
t
ADSCH
t
AS
t
AH
t
WS
t
WH
t
CSS
t
ADVS
t
DS
t
DH
CLK
ADSP
ADSC
Address
BWE
CE0, CE2
ADV
OE
Din
t
CSH
t
ADVH
D(A2Ý01)
D(A2Ý10) D(A3)D(A2) D(A2Ý01) D(A3Ý01) D(A3Ý10)
D(A1)
D(A2Ý11)
ADV SUSPENDS BURST
ADSC LOADS NEW ADDRESS
A1
A2
A3
t
CH
CE1
BW[a:d]
Read
Q(A1)
Sus-
pend
Write
D(A1)
Read
Q(A2)
Suspend
Write
D(A
2
)
ADV
Burst
Write
D(A
2Ý01
)
Suspend
Write
D(A
2Ý01
)
ADV
Burst
Write
D(A
2Ý10
)
Write
D(A
3
)
Burst
Write
D(A
3Ý01
)
ADV
Burst
Write
D(A
2Ý11
)
ADV
Burst
Write
D(A
3Ý10
)
