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AS4DDR32M72-10/ET

AS4DDR32M72-10/ET首页预览图
型号: AS4DDR32M72-10/ET
PDF文件:
  • AS4DDR32M72-10/ET PDF文件
  • AS4DDR32M72-10/ET PDF在线浏览
功能描述: 32Mx72 DDR SDRAM iNTEGRATED Plastic Encapsulated Microcircuit
PDF文件大小: 357.18 Kbytes
PDF页数: 共19页
制造商: AUSTIN[Austin Semiconductor]
制造商LOGO: AUSTIN[Austin Semiconductor] LOGO
制造商网址: http://www.austinsemiconductor.com
捡单宝AS4DDR32M72-10/ET
PDF页面索引
120%
ii
ii
i
PEMPEM
PEMPEM
PEM
2.4G2.4G
2.4G2.4G
2.4G
b SDRAM-DDRb SDRAM-DDR
b SDRAM-DDRb SDRAM-DDR
b SDRAM-DDR
AS4DDR32M72PBG
AS4DDR32M72PBG
Rev. 1.2 06/09
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
12
Austin Semiconductor, Inc.
DC ELECTRICAL CHARACTERISTICS AND OPERATING CONDITIONS (NOTES 1,6)
V
CC
, V
CCQ
= +2.5V ± 0.2V; -55
o
C ± 0.2V, -55
o
C T
A
+125
o
C
AC INPUT OPERATING CONDITIONS (NOTES 1,6)14, 28, 40
V
CC
, V
CCQ
= +2.5V ± 0.2V; -55
o
C ± 0.2V, -55
o
C T
A
+125
o
C
I
CC
SPECIFICATIONS AND CONDITIONS (NOTES 1-5, 10, 12, 14)
V
CC
, V
CCQ
= +2.5V ± 0.2V; -55
o
C ± 0.2V, -55
o
C T
A
+125
o
C
Parameter / Condition Symbol Min Max Units
Supply Voltage
V
CC
2.3 2.7 V
I/O Supply Voltage
V
CCQ
2.3 2.7 V
Input Leakage Current: Any input 0V V
IN
V
CC
(All other pins not under test = 0V) I
I
-2 2 µA
Input Leakage Address Current (All other pins not under test = 0V)
I
I
-10 10 µA
Output Leakage Current: I/O's are disabled; 0V V
OUT
V
CC
I
OZ
-5 5 µA
Output Levels: Full drive option
High Current (V
OUT
= V
CCQ
- 0.373V, minimum V
REF
, minimum V
TT
)
Low Current (V
OUT
= 0.373V, maximum V
REF
, maximum V
TT
)
I
OL
12 - mA
Output Levels: Reduced drive option
High Current (V
OUT
= V
CCQ
- 0.763V, minimum V
REF
, minimum V
TT
)
Low Current (V
OUT
= 0.763V, maximum V
REF
, maximum V
TT
)
I
OLR
9-mA
I/O Reference Voltage (6)
V
REF
0.49 x V
CCQ
0.51 x V
CCQ
V
I/O Termination Voltage (53)
V
TT
V
REF
- 0.04 V
REF
+ 0.04
V
mA
-9 - mA
I
OH
I
OHR
-12 -
Parameter / Condition Symbol Min Max Units
Input High (Logic 1) Voltage:
V
IH
(AC) V
REF
+ 0.310
-V
Input Low (Logic ) Voltage:
V
IL
(AC)
-
V
REF
- 0.310
V
333, 266
250 Mbps
PRECHARGE POWER-DOWN STANDBY CURRENT: All banks idle; Power-down mode; t
CK
=t
CK
(MIN); CKE=LOW; (23, 32. 50) I
CC2P
20 20 mA
ACTIVE POWER-DOWN STANDBY CURRENT: One bank active; Power-down mode; t
CK
=t
CK
(MIN); CKE=LOW (23, 32, 50) I
CC3P
150 150 mA
I
CC5
1225 1225 mA
I
CC5A
30 30 mA
SELF REFRESH CURRENT: CKE 0.2V
I
CC6
20 20 mAStandard (11)
Parameter / Condition
t
REF
=t
RC
(MIN) (27, 50)
t
REF
=7.8125 µs (27, 50)
AUTO REFRESH CURRENT
IDLE STANDBY CURRENT: CS#=HIGH, All banks idle; t
CK
=t
CK
(MIN); CKE=HIGH; Address and other control inputs changing once per clock
cycle. V
IN
=V
REF
for DQ, DQS and DM (51)
ACTIVE STANDBY CURRENT: CS#=HIGH; CKE=HIGH; One bank; Active Precharge; t
RC
=t
RAS
(MAX); t
CK
=t
CK
(MIN); DQ, DM and DQS inputs
changin twicer per clock cycle; Address and other control inputs changing once per clock cycle (22)
OPERATING CURRENT: Burst=2; Reads; Continuous burst; One bank active; Address and control inputs changing once per clock cycle; t
CK
=t
CK
(MIN); I
OUT
=0mA (22,48)
OPERATING CURRENT: Burst=2; Writes; Continuous burst; One bank active; Address and control inputs changing once per clock cycle; t
CK
=t
CK
(MIN); DQ, DM and DQS inputs changin twice per clock cycle (22)
OPERATING CURRENT: Four bank interleaving DEADs (BL=4) with auto precharge, t
RC
=t
RC
(MIN); t
CK
=t
CK
(MIN); Addresses and control inputs
change only during Active READ or WRITE commands. (22, 49)
I
CC0
I
CC1
I
CC2F
I
CC3N
I
CC4R
I
CC4W
I
CC7
OPERATING CURRENT: One bank, Active-Precharge; t
RC
= t
RC
(MIN); t
CK
= t
CK
(MIN); DQ, DM, and DQS inputs changing once per clock cycle;
Address and control inputs changing once every two clock cycles; (22, 48)
OPERATING CURRENT: One bank, Active-Read- Precharge; Burst=2; t
RC
= t
RC
(MIN); t
CK
= t
CK
(MIN); I
OUT
= 0mA; Address and control inputs
changing once every two clock cycles; (22, 48)
Units200 Mbps
Max
Symbol
625 600 mA
850 775 mA
225 225 mA
250 250 mA
2000 2000 mA
925 925 mA
800 800 mA
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