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AM5706, AM5708
SPRS961B –AUGUST 2016–REVISED SEPTEMBER 2017
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Detailed Description Copyright © 2016–2017, Texas Instruments Incorporated
• System instrumentation (trace)
– Supported by a CTools System Trace Module (CT_STM), implementing MIPI System Trace
Protocol (STP) (rev 2.0)
– Real-time software trace
• MPU software instrumentation through CoreSight STM (CS_STM) (STP2.0)
• System-on-chip (SoC) software instrumentation through CT_STM (STP2.0)
– OCP watchpoint (OCP_WP_NOC)
• OCP target traffic monitoring: OCP_WP_NOC can be configured to generate a trigger upon
watchpoint match (that is, when target transaction attributes match the user-defined attributes).
• SoC events trace
• DMA transfer profiling
– Statistics collector (performance probes)
• Computes traffic statistics within a user-defined window and periodically reports to the user
through the CT_STM interface
• Embedded in the L3_MAIN interconnect
• 10 instances:
– 1 instance dedicated to target (SDRAM) load monitoring
– 9 instances dedicated to master latency monitoring
– IVA instrumentation (hardware accelerator [HWA] profiling)
• Supported through a software message and system trace event (SMSET) module embedded in
the IVA subsystem
– Power-management events profiling (PM instrumentation [PMI])
• Monitoring major power-management events. The PM state changes are handled as generic
events and encapsulated in STP messages.
– Clock-management events profiling (CM instrumentation [CMI])
• Monitoring major clock management events. The CM state changes are handled as generic
events and encapsulated in STP messages.
• Two instances, one per CM
– CM1 Instrumentation (CMI1) module mapped in the PD_CORE_AON power domain
– CM2 Instrumentation (CMI2) module mapped in the PD_CORE power domain
– For more information, see System Instrumentation section of the Device TRM.
• Performance monitoring
– Supported by subsystem counter timer module (SCTM) for IPU
– Supported by performance monitoring unit (PMU) for MPU subsystem
For more information, see chapter On-Chip Debug Support of the device TRM.
