EDIO_SOF
3
1
2
EDIO_DATA_IN[7:0]
SPRS91x_TIMING_PRU_ECAT_03
EDC_SYNCx_OUT
3
1
2
EDIO_DATA_IN[7:0]
SPRS91x_TIMING_PRU_ECAT_02
294
AM5706, AM5708
SPRS961B –AUGUST 2016–REVISED SEPTEMBER 2017
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Specifications Copyright © 2016–2017, Texas Instruments Incorporated
Table 5-162. PRU-ICSS ECAT Timing Requirements – Input Validated With SYNCx
NO. PARAMETER DESCRIPTION MIN MAX UNIT
1 t
w(EDC_SYNCx_OUT)
Pulse width, EDC_SYNCx_OUT 100.00 ns
2 t
su(EDIO_DATA_IN-
EDC_SYNCx_OUT)
Setup time, EDIO_DATA_IN valid before EDC_SYNCx_OUT active
edge
20.00 ns
3 t
h(EDC_SYNCx_OUT-
EDIO_DATA_IN)
Hold time, EDIO_DATA_IN valid after EDC_SYNCx_OUT active edge 20.00 ns
Figure 5-114. PRU-ICSS ECAT Input Validated With SYNCx Timing
Table 5-163. PRU-ICSS ECAT Timing Requirements – Input Validated With Start of Frame (SOF)
NO. PARAMETER DESCRIPTION MIN MAX UNIT
1 t
w(EDIO_SOF)
Pulse duration, EDIO_SOF 4 × P
(1)
5 × P
(1)
ns
2 t
su(EDIO_DATA_IN-
EDIO_SOF)
Setup time, EDIO_DATA_IN valid before EDIO_SOF active edge 20.00 ns
3 t
h(EDIO_SOF-
EDIO_DATA_IN)
Hold time, EDIO_DATA_IN valid after EDIO_SOF active edge 20.00 ns
(1) ICSS_IEP_CLK clock period
Figure 5-115. PRU-ICSS ECAT Input Validated With SOF
Table 5-164. PRU-ICSS ECAT Timing Requirements - LATCHx_IN
NO. PARAMETER DESCRIPTION MIN MAX UNIT
1 t
w(EDC_LATCHx_IN)
Pulse duration, EDC_LATCHx_IN 3 × P
(1)
ns