230
AM5706, AM5708
SPRS961B –AUGUST 2016–REVISED SEPTEMBER 2017
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Specifications Copyright © 2016–2017, Texas Instruments Incorporated
NOTE
To configure the desired Manual IO Timing Mode the user must follow the steps described in
section Manual IO Timing Modes of the Device TRM.
The associated registers to configure are listed in the CFG REGISTER column. For more
information see the Control Module chapter in the Device TRM.
Manual IO Timings Modes must be used to guaranteed some IO timings for QSPI. See Table 5-29 Modes
Summary for a list of IO timings requiring the use of Manual IO Timings Modes. See Table 5-68 Manual
Functions Mapping for QSPI for a definition of the Manual modes.
Table 5-68 lists the A_DELAY and G_DELAY values needed to calculate the correct values to be set in
the CFG_x registers.
Table 5-68. Manual Functions Mapping for QSPI
BALL BALL NAME QSPI1_MANUAL1 CFG REGISTER MUXMODE
A_DELAY (ps) G_DELAY (ps) 1
L1 gpmc_a3 0 0 CFG_GPMC_A3_OUT qspi1_cs2
K3 gpmc_a4 0 0 CFG_GPMC_A4_OUT qspi1_cs3
H3 gpmc_a13 0 0 CFG_GPMC_A13_IN qspi1_rtclk
H4 gpmc_a14 2247 1186 CFG_GPMC_A14_IN qspi1_d3
K6 gpmc_a15 2176 1197 CFG_GPMC_A15_IN qspi1_d2
K5 gpmc_a16 2229 1268 CFG_GPMC_A16_IN qspi1_d0
K5 gpmc_a16 0 0 CFG_GPMC_A16_OUT qspi1_d0
G2 gpmc_a17 2251 1217 CFG_GPMC_A17_IN qspi1_d1
F2 gpmc_a18 0 0 CFG_GPMC_A18_OUT qspi1_sclk
G4 gpmc_cs2 0 0 CFG_GPMC_CS2_OUT qspi1_cs0
G3 gpmc_cs3 0 0 CFG_GPMC_CS3_OUT qspi1_cs1
5.9.6.15 McASP
The multichannel audio serial port (McASP) functions as a general-purpose audio serial port optimized for
the needs of multichannel audio applications. The McASP is useful for time-division multiplexed (TDM)
stream, Inter-Integrated Sound (I2S) protocols, and intercomponent digital audio interface transmission
(DIT).
The device have integrated 8 McASP modules (McASP1-McASP8) with:
• McASP1 and McASP2 modules supporting 16 channels with independent TX/RX clock/sync domain
• McASP3 through McASP7 modules supporting 4 channels with independent TX/RX clock/sync domain
• McASP8 module supporting 2 channels with independent TX/RX clock/sync domain
NOTE
For more information, see the Serial Communication Interface section of the Device TRM.
CAUTION
The I/O Timings provided in this section are valid only for some McASP usage
modes when the corresponding Virtual I/O Timings or Manual I/O Timings are
configured as described in the tables found in this section.
Table 5-69, Table 5-70, Table 5-71 and Figure 5-53 present Timing Requirements for McASP1 to
McASP8
