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AM5706, AM5708
SPRS961B –AUGUST 2016–REVISED SEPTEMBER 2017
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Specifications Copyright © 2016–2017, Texas Instruments Incorporated
Table 5-41. VOUT2 IOSETs (continued)
SIGNALS IOSET1
BALL MUX
vout2_d9 C11 4
vout2_d8 B12 4
vout2_d7 A12 4
vout2_d6 A13 4
vout2_d5 E11 4
vout2_d4 F11 4
vout2_d3 B13 4
vout2_d2 E13 4
vout2_d1 C13 4
vout2_d0 D13 4
vout2_vsync B8 4
vout2_hsync E8 4
vout2_clk C7 4
vout2_fld D8 4
vout2_de B7 4
In are presented the specific groupings of signals (IOSET) for use with VOUT3.
NOTE
To configure the desired virtual mode the user must set MODESELECT bit and
DELAYMODE bitfield for each corresponding pad control register.
The pad control registers are presented in Table 4-31 and described in Device TRM, Control
Module Chapter.
Virtual IO Timings Modes must be used to guaranteed some IO timings for VOUT3. See Table 5-29
Modes Summary for a list of IO timings requiring the use of Virtual IO Timings Modes. See Table 5-42
Virtual Functions Mapping for VOUT3 for a definition of the Virtual modes.
Table 5-42 presents the values for DELAYMODE bitfield.
Table 5-42. Virtual Functions Mapping for DSS VOUT3
BALL BALL NAME Delay Mode Value MUXMODE
DSS_VIRTUAL1 3
B4 gpmc_ad15 14 vout3_d15
K4 gpmc_a8 15 vout3_hsync
D1 gpmc_ad4 14 vout3_d4
F1 gpmc_ad0 14 vout3_d0
C4 gpmc_ad13 14 vout3_d13
L2 gpmc_a2 15 vout3_d18
E2 gpmc_ad1 14 vout3_d1
K3 gpmc_a4 15 vout3_d20
J1 gpmc_a6 15 vout3_d22
A3 gpmc_ad14 14 vout3_d14
M2 gpmc_a1 15 vout3_d17
G3 gpmc_cs3 15 vout3_clk
H1 gpmc_a9 15 vout3_vsync
B3 gpmc_ad11 14 vout3_d11
