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SPRS961B –AUGUST 2016–REVISED SEPTEMBER 2017
Table 5-32. VIN2 IOSETs (continued)
SIGNALS IOSET1 IOSET2 IOSET4 IOSET5 IOSET6 IOSET7
(1)
IOSET8
(1)
IOSET9
(1)
IOSET10 IOSET11
BALL MUX BALL MUX BALL MUX BALL MUX BALL MUX BALL MUX BALL MUX BALL MUX BALL MUX BALL MUX
vin2b_d1 E7 6 E7 6 C13 2 C13 2 Y3 4 E7 6 E7 6
vin2b_d2 D6 6 D6 6 E13 2 E13 2 W2 4 D6 6 D6 6
vin2b_d3 C5 6 C5 6 B13 2 B13 2 AA3 4 C5 6 C5 6
vin2b_d4 B5 6 B5 6 F11 2 F11 2 AA2 4 B5 6 B5 6
vin2b_d5 D7 6 D7 6 E11 2 E11 2 Y4 4 D7 6 D7 6
vin2b_d6 C6 6 C6 6 A13 2 A13 2 Y1 4 C6 6 C6 6
vin2b_d7 A5 6 A5 6 A12 2 A12 2 Y2 4 A5 6 A5 6
(1) The IOSET under this column is only applicable for pins with alternate functionality which allows either VIN1 or VIN2 signals to be mapped to the pins. These alternate functions are
controlled via CTRL_CORE_VIP_MUX_SELECT register. For more information on how to use these options, please refer to Device TRM, Chapter Control Module, Section Pad
Configuration Registers.
NOTE
To configure the desired Manual IO Timing Mode the user must follow the steps described in section "Manual IO Timing Modes" of the
Device TRM.
The associated registers to configure are listed in the CFG REGISTER column. For more information please see the Control Module
Chapter in the Device TRM.
Manual IO Timings Modes must be used to guaranteed some IO timings for VIP1. See Table 5-29 Modes Summary for a list of IO timings
requiring the use of Manual IO Timings Modes. See Table 5-33 Manual Functions Mapping for VIN2A (IOSET4/5/6) for a definition of the Manual
modes.
Table 5-33 lists the A_DELAY and G_DELAY values needed to calculate the correct values to be set in the CFG_x registers.
Table 5-33. Manual Functions Mapping for VIN2A (IOSET4/5/6)
BALL BALL NAME VIP_MANUAL3 VIP_MANUAL5 CFG REGISTER MUXMODE
A_DELAY (ps) G_DELAY (ps) A_DELAY (ps) G_DELAY (ps) 0 1 4
P5 RMII_MHZ_50_CL
K
2616 1379 2798 1294 CFG_RMII_MHZ_50_CLK_IN - - vin2a_d11
L6 mdio_d 2558 1105 2790 954 CFG_MDIO_D_IN - - vin2a_d0
L5 mdio_mclk 998 463 1029 431 CFG_MDIO_MCLK_IN - - vin2a_clk0
N2 rgmii0_rxc 2658 862 2896 651 CFG_RGMII0_RXC_IN - - vin2a_d5
P2 rgmii0_rxctl 2658 1628 2844 1518 CFG_RGMII0_RXCTL_IN - - vin2a_d6
N4 rgmii0_rxd0 2638 1123 2856 888 CFG_RGMII0_RXD0_IN - - vin2a_fld0
N3 rgmii0_rxd1 2641 1737 2804 1702 CFG_RGMII0_RXD1_IN - - vin2a_d9
