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AM5706BCBDDEA

型号：	AM5706BCBDDEA
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功能描述：	Sitara Processors
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AM5706BCBDDEA

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ADVANCEINFORMATION

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Product Folder Links: AM5706 AM5708

171

AM5706, AM5708

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SPRS961B –AUGUST 2016–REVISED SEPTEMBER 2017

Table 5-31. VIN1 IOSETs (continued)

SIGNALS IOSET2 IOSET6

(1)

IOSET7

(1)

IOSET8 IOSET9 IOSET10

BALL MUX BALL MUX BALL MUX BALL MUX BALL MUX BALL MUX

vin1a_d20 K3 2

vin1a_d21 K2 2

vin1a_d22 J1 2

vin1a_d23 K1 2

vin1b

vin1b_clk1 L5 5 J2 6

vin1b_hsync1 P3 5 K4 6

vin1b_vsync1 R2 5 H1 6

vin1b_fld1 N4 5 G1 6

vin1b_de1 P4 5 L3 6

vin1b_d0 L6 5 M1 6

vin1b_d1 N5 5 M2 6

vin1b_d2 N6 5 L2 6

vin1b_d3 T4 5 L1 6

vin1b_d4 T5 5 K3 6

vin1b_d5 N2 5 K2 6

vin1b_d6 P2 5 J1 6

vin1b_d7 N1 5 K1 6

(1) The IOSET under this column is only applicable for pins with alternate functionality which allows either VIN1 or VIN2 signals to be mapped to the pins. These alternate functions are

controlled via CTRL_CORE_VIP_MUX_SELECT register. For more information on how to use these options, please refer to Device TRM, Chapter Control Module, Section Pad

Configuration Registers.

Table 5-32. VIN2 IOSETs

SIGNALS IOSET1 IOSET2 IOSET4 IOSET5 IOSET6 IOSET7

(1)

IOSET8

(1)

IOSET9

(1)

IOSET10 IOSET11