Copyright © 2016–2017, Texas Instruments Incorporated Terminal Configuration and Functions
Submit Documentation Feedback
Product Folder Links: AM5706 AM5708
17
AM5706, AM5708
www.ti.com
SPRS961B –AUGUST 2016–REVISED SEPTEMBER 2017
Table 4-1. Pin Attributes
(1)
(continued)
BALL NUMBER
[1]
BALL NAME [2] SIGNAL NAME [3] PN [4]
MUXMODE
[5]
TYPE [6]
BALL
RESET
STATE [7]
BALL
RESET
REL.
STATE [8]
BALL
RESET
REL.
MUXMODE
[9]
I/O
VOLTAGE
VALUE
[10]
POWER
[11]
HYS [12]
BUFFER
TYPE [13]
PULL
UP/DOWN
TYPE [14]
DSIS [15]
AD18 ddr1_odt0 ddr1_odt0 0 O PD drive 0
(OFF)
1.35/1.5 vdds_ddr1 No LVCMOS
DDR
PUx/PDy
Y20 ddr1_vref0 ddr1_vref0 0 PWR OFF drive 1
(OFF)
1.35/1.5 vdds_ddr1 No LVCMOS
DDR
C21 emu0 emu0 0 IO PU PU 0 1.8/3.3 vddshv3 Yes Dual
Voltage
LVCMOS
PU/PD
gpio8_30 14 IO
C22 emu1 emu1 0 IO PU PU 0 1.8/3.3 vddshv3 Yes Dual
Voltage
LVCMOS
PU/PD
gpio8_31 14 IO
E14 emu2 emu2 2 O PD PD 15 1.8/3.3 vddshv3 Yes Dual
Voltage
LVCMOS
PU/PD
F14 emu3 emu3 2 O PD PD 15 1.8/3.3 vddshv3 Yes Dual
Voltage
LVCMOS
PU/PD
F13 emu4 emu4 2 O PD PD 15 1.8/3.3 vddshv3 Yes Dual
Voltage
LVCMOS
PU/PD
Y5 gpio6_10 gpio6_10 0 IO PU PU 15 1.8/3.3 vddshv7 Yes Dual
Voltage
LVCMOS
PU/PD
mdio_mclk 1 O 1
i2c3_sda 2 IO 1
vin2b_hsync1 4 I
vin1a_clk0 9 I 0
ehrpwm2A 10 O
pr2_mii_mt1_clk 11 I 0
pr2_pru0_gpi0 12 I
pr2_pru0_gpo0 13 O
gpio6_10 14 IO
Driver off 15 I
Y6 gpio6_11 gpio6_11 0 IO PU PU 15 1.8/3.3 vddshv7 Yes Dual
Voltage
LVCMOS
PU/PD
mdio_d 1 IO 1
i2c3_scl 2 IO 1
vin2b_vsync1 4 I
vin1a_de0 9 I 0
ehrpwm2B 10 O
pr2_mii1_txen 11 O
pr2_pru0_gpi1 12 I
pr2_pru0_gpo1 13 O
gpio6_11 14 IO
Driver off 15 I