An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. ADVANCE INFORMATION for pre-production products; subject to
change without notice.
AM5706, AM5708
SPRS961B –AUGUST 2016–REVISED SEPTEMBER 2017
AM570x Sitara™ Processors
1 Device Overview
1
1.1 Features
1
• ARM
®
Cortex
®
-A15 Microprocessor Subsystem
• C66x Floating-Point VLIW DSP
– Fully Object-Code Compatible With C67x and
C64x+
– Up to Thirty-two 16 × 16-Bit Fixed-Point
Multiplies per Cycle
• Up to 512KB of On-Chip L3 RAM
• Level 3 (L3) and Level 4 (L4) Interconnects
• DDR3/DDR3L Memory Interface (EMIF) Module
– Supports Up to DDR3-1333 (667 MHz)
– Up to 2GB Across Single Chip Select
• Dual ARM® Cortex®-M4 Coprocessors
• IVA-HD Subsystem
• Display Subsystem
– Full-HD Video (1920 × 1080p, 60 fps)
– Multiple Video Input and Video Output
– 2D and 3D Graphics
– Display Controller With DMA Engine and Up to
Three Pipelines
– HDMI™ Encoder: HDMI 1.4a and DVI 1.0
Compliant
• 2x Dual-Core Programmable Real-Time Unit and
Industrial Communication Subsystem (PRU-ICSS)
• Accelerator (BB2D) Subsystem
– Vivante
®
GC320 Core
• Video Processing Engine (VPE)
• Available Single-Core PowerVR™ SGX544 3D
GPU
• One Video Input Port (VIP) Module
– Support for Up to Four Multiplexed Input Ports
• General-Purpose Memory Controller (GPMC)
• Enhanced Direct Memory Access (EDMA)
Controller
• Ethernet Subsystem
• Sixteen 32-Bit General-Purpose Timers
• 32-Bit MPU Watchdog Timer
• Five High-Speed Inter-Integrated Circuit (I
2
C) Ports
• HDQ™/ 1-Wire
®
Interface
• Ten Configurable UART/IrDA/CIR Modules
• Four Multichannel Serial Peripheral Interfaces
(McSPI)
• Quad SPI Interface (QSPI)
• Eight Multichannel Audio Serial Port (McASP)
Modules
• SuperSpeed USB 3.0 Dual-Role Device
• High-Speed USB 2.0 Dual-Role Device
• Four MultiMedia Card/Secure Digital/Secure Digital
Input Output Interfaces (MMC/SD/SDIO)
• PCI Express® 3.0 Subsystem With 5-Gbps Lane
– One 2-lane Gen2-Compliant Port
– or Two 1-lane Gen2-Compliant Ports
• Dual Controller Area Network (DCAN) Modules
– CAN 2.0B Protocol
• MIPI™ CSI-2 Camera Serial Interface
• Up to 186 General-Purpose I/O (GPIO) Pins
• Power, Reset, and Clock Management
• On-Chip Debug With CTools Technology
• 28-nm CMOS Technology
• 17 mm × 17 mm, 0.65-mm Pitch, 538-Pin FCBGA
(CBD)
