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AM49DL640BG40IT

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型号: AM49DL640BG40IT
PDF文件:
  • AM49DL640BG40IT PDF文件
  • AM49DL640BG40IT PDF在线浏览
功能描述: Stacked Multi-Chip Package (MCP) Flash Memory and SRAM
PDF文件大小: 1103.02 Kbytes
PDF页数: 共62页
制造商: SPANSION[SPANSION]
制造商LOGO: SPANSION[SPANSION] LOGO
制造商网址: http://www.spansion.com
捡单宝AM49DL640BG40IT
PDF页面索引
120%
March 8, 2002 Am49DL640BG 57
PRELIMINARY
FLASH ERASE AND PROGRAMMING PERFORMANCE
Notes:
1. Typical program and erase times assume the following conditions: 25°C, 3.0 V V
CC
, 1,000,000 cyc les. Additiona lly,
programming typicals assume checkerboard pattern.
2. Under worst case conditio ns of 90°C, V
CC
= 2.7 V, 1,000,000 cycles.
3. The typic al chip programming time is considerably less than the maximum chip programming time listed, since most bytes
program faster than the maximum program times listed.
4. In the pre-programming step of the Embedded Erase algorithm, all bytes are programmed to 00h before erasure.
5. System-level overhead is the time requi red to execute the two- or four-bus-cycle sequence for the program command. See Table
12 for further information on command definitions.
6. The device has a minimum erase and program cycle endurance of 1,000,000 cycles.
LATCHUP CHARACTERISTICS
Note: Includes all pins except V
CC
. Test conditions: V
CC
= 3.0 V, one pin at a time.
PACKAGE PIN CAPACITANCE
Notes:
1. Sampled, not 100% tested.
2. Test conditions T
A
= 25°C, f = 1.0 MHz.
FLASH DATA RETENTION
Parameter Typ (Note 1) Max (Note 2) Unit Comments
Sector Erase Time 0.4 5 sec
Excludes 00h programmi ng
prior to erasure (Note 4)
Chip Erase Time 56 sec
Byte Program Time 5 150 µs
Excludes system level
overhead (Note 5)
Accelerated Byte/Word Program Time 4 120 µs
Word Program Time 7 210 µs
Chip Program Time
(Note 3)
Byte Mode 42 126
sec
Word Mode 28 84
Description Min Max
Input voltage with respect to V
SS
on all pins except I/O pins
(including A9, OE#, and RESET#)
1.0 V 12.5 V
Input voltage with respect to V
SS
on all I/O pins 1.0 V V
CC
+ 1.0 V
V
CC
Curre nt 100 mA +100 mA
Parameter
Symb ol Para meter Desc riptio n Test Setup Typ Max Uni t
C
IN
Input Capacitance V
IN
= 0 11 14 pF
C
OUT
Output Capacitance V
OUT
= 0 12 16 pF
C
IN2
Control Pin Capacitance V
IN
= 0 14 16 pF
C
IN3
WP#/ACC Pin Capacitance V
IN
= 0 17 20 pF
Parameter Description Test Conditions Min Unit
Minimum Pattern Data Retention Time
150°C10Years
125°C20Years
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