March 8, 2002 Am49DL640BG 51
PRELIMINARY
FLASH AC CHARACTERISTICS
t
GHEL
t
WS
OE#
CE#f
WE#
RESET#
t
DS
Data
t
AH
Addresses
t
DH
t
CP
DQ7# D
OUT
t
WC
t
AS
t
CPH
PA
Data# Polling
A0 for program
55 for erase
t
RH
t
WHWH1 or 2
RY/BY#
t
WH
PD for program
30 for sector erase
10 for chip erase
555 for program
2AA for erase
PA for program
SADD for sector erase
555 for chip erase
t
BUSY
Notes:
1. Figure indicates last two bus cycles of a program or erase operation.
2. P A = program address, SADD = sector address, PD = program data.
3. DQ7# is the complement of the data written to the device. D
OUT
is the data written to the device.
4. Waveforms are for the wor d mode.
Figure 27. Flash Alternate CE#f Controlled Write (Erase/Program) Operation Timings