March 8, 2002 Am49DL640BG 41
PRELIMINARY
FLASH AC CHARACTERISTICS
Hardware Reset (RESET#)
Note: Not 100% tested.
Parameter
Description All Speed Options UnitJEDE C Std
t
Ready
RESET# Pin Low (During Embedded Algorithms)
to Read Mode (See Note)
Max 20 µs
t
Ready
RESET# Pin Low (NOT During Embedded
Algorithms) to Read Mode (See Note)
Max 500 ns
t
RP
RESET# Pulse Width Min 500 ns
t
RH
Reset High Time Before Read (See Note) Min 50 ns
t
RPD
RESET# Low to Standby Mode Min 20 µs
t
RB
RY/BY# Recovery Time Min 0 ns
RESET#
RY/BY#
RY/BY#
t
RP
t
Ready
Reset Timings NOT during Embedded Algorithms
t
Ready
CE#f, OE#
t
RH
CE#f, OE#
Reset Timings during Embedded Algorithms
RESET#
t
RP
t
RB
Figure 15. Reset Timings
