March 8, 2002 Am49DL640BG 33
PRELIMINARY
Table 13. Write Operation Status
Notes:
1. DQ5 switches to ‘1’ when an Embedded Program or Embedded Erase operation has exceeded the maximum timing limits.
Refer to the section on DQ5 for more information.
2. DQ7 and DQ2 require a valid address when reading status information. Refer to the appropriate subsection for further
details.
3. When reading write operation status bits, the system must always provide the bank address where the Embedded Algorithm
is in progress. The device outputs array data if the system addresses a non-busy bank.
Status
DQ7
(Note 2) DQ6
DQ5
(N ote 1) D Q3
DQ2
(N ote 2) RY/BY#
Standard
Mode
Embedded Program Algorithm DQ7# Toggle 0 N/A No toggle 0
Embedded Erase Algorithm 0 Toggle 0 1 Toggle 0
Erase
Suspend
Mode
Erase-Suspend-
Read
Erase
Suspended Sec tor
1 No toggle 0 N/A Toggle 1
Non-Erase
Suspended Sec tor
Data Data Data Data Data 1
Erase-Suspend-Program DQ7# Toggle 0 N/A N/A 0
