2 Am49DL640BG March 8, 2002
PRELIMINARY
GENERAL DESCRIPTION
Am29DL640G Features
The Am29DL640G is a 64 m egabit, 3.0 volt-only flash
memory device, organized as 4,194,304 words of 16
bits each or 8,388,608 bytes of 8 bits each. Word
mode data appears on DQ15–DQ0; byte mode data
appears on DQ7–DQ0. The device is designed to be
programmed in-system with t he standard 3 .0 volt V
CC
supply, and can also be programmed in standard
EPROM programmers.
The devic e is av ailable with an access time of 70 or 85
ns and is of fered in a 73-ball FBGA package. Stand ard
control pins—chip enable (CE#f), write enable (WE#),
and ou tput enable (OE#)—control normal read and
write oper ations, and avoid bus contention issues.
The device requi res only a single 3.0 volt power sup-
ply for both read and write functions. Internally gener-
ated and regulated voltages are provided for the
program and erase operations.
Simultaneous Read/Write Operations with
Zero Lat ency
The Simultaneous Read/Write architecture provides
simultaneous operation by dividing the memory
space int o fou r banks, two 8 Mb b anks with small and
large sectors, and two 24 Mb banks of large sectors
only. Sector addresses are fixed, system software can
be used to form user-defined bank groups.
During an Erase/Program operation, any of the three
non-busy banks may be read from. Note that only two
banks can oper ate simultaneously. The device can im -
prov e ov eral l syste m pe rf orma nce by a llowin g a h ost
system to program or erase in one bank, then
immediately and simultaneously read from the other
bank, with zero latency. Thi s releases the system from
waiting for the completion of program or erase
operations.
The Am29 DL640G can b e orga nized a s bot h a top
and bottom boot sector configuration.
The Se c S i™ (Secured Silicon) Sector is an extra
256 by te sec tor ca pable o f bei ng per manen tly locked
by AMD or customers. The SecSi Indicator Bit (DQ7)
is permanently set to a 1 if the part is factory locked,
and set to a 0 if customer lo ckab le. This way, cus-
tomer lockable parts can never be used to replace a
factory loc ked part.
Factory locked parts provide several options. The
SecSi Sector may store a secure, random 16 byte
ESN (Electronic Serial Numb er), custo mer code (p ro-
gram med throu gh AMD’s ExpressFlash s ervice), or
both. Customer Lockable parts may utilize the SecSi
Sector as a one-time programmable area.
DMS (Data Management Software) allows systems
to easily take advantage of the advanced architecture
of the simultaneous read/write product line by allowing
removal of EEPROM devices. DMS will also allow the
sy stem softwa re to b e simplif ied, a s it will p erfor m all
functions necessary to modify data in file structures,
as opposed to single-byte modifications. To write or
upda te a p articu lar pie ce of da ta ( a phone nu mber or
con figurati on d ata, for example), the user only nee ds
to state which piece of data is to be updated, and
where the updated data is located in the system. This
is an advantage compared to systems where
use r-w ritten s oftwa re mu st keep trac k of the old d ata
location, status, logical to physical t ranslation of the
data onto the Flash memory device (or memory de-
vices), and more. Using DMS, user-written software
does not need to interface with the Flash memory di-
rectly. Instead, the user's software accesses the Flash
memory by calling one of only six functions. AMD pro-
vides this software to simplify system design and soft-
ware integration efforts.
The device offers complete compatibility with the
JEDEC single-power-supply Flash command set
standard. Co mmands a re writte n to the com mand
register using standard microprocessor write timings.
Reading d ata out of the device is similar to reading
from other Fl ash or EPROM devices.
The host system can detect whether a program or
erase operation is complete by using the device sta-
tus bits: RY/BY# pin, DQ7 (Data# Polling) and
DQ6/DQ2 (toggle bits). After a program or erase cycle
has been completed, the device automatically re turns
to the read mode.
The sector erase architecture allows memory se c-
tors to be erased and reprogrammed without affecting
the data co ntents of ot her sector s. Th e devi ce is fu lly
erased when shipped from the factory.
Hardware data protection measures include a low
V
CC
detector that automatically inhibits write opera-
tions durin g power tra nsition s. The ha rdwa re s ector
prote ction feature disables both program and erase
operation s in any c ombination of the sect ors of mem-
ory. This can be achieved in-system or via program-
ming equipment.
The device offers two power-saving features. When
addresses have been stable for a specified amount of
time, the device enters the automatic sleep mo de.
The system can also place the device into the
standby mode. Power consumption is greatly re-
duced in both modes.
Bank Megabits Sector Sizes
Bank 1 8 Mb
Eight 8 Kbyte/4 Kword,
Fifteen 64 Kbyte/32 Kword
Bank 2 24 Mb Forty-eight 64 Kbyte/32 Kword
Bank 3 24 Mb Forty-eight 64 Kbyte/32 Kword
Bank 4 8 Mb
Eight 8 Kbyte/4 Kword,
Fifteen 64 Kbyte/32 Kword
