March 8, 2002 Am49DL640BG 11
PRELIMINARY
Table 2. Device Bus Operations—Flash Byte Mode, CIOf = V
IL
Legend: L = Logic Low = V
IL
, H = Logic High = V
IH
, V
ID
= 11.5–12.5 V, V
HH
= 9.0 ± 0.5 V, X = Don’t Care, SA = pSRAM Address Input, Byte Mode,
SADD = Flash Sector Address, A
IN
= Address In, D
IN
= Data In, D
OUT
= Data Out
Notes:
1. Other operations except for those indicated in this column are
inhibited.
2. Do not apply CE#f = V
IL
, CE1#s = V
IL
and CE2s = V
IH
at the same
time.
3. Don’t care or open LB#s or UB#s.
4. If WP#/ACC = V
IL
, the boot sectors will be protected. If WP#/ACC
= V
IH
the boot sectors protection will be removed.
If WP#/ACC = V
ACC
(9V), the progr am time will be reduced by
40%.
5. The sector protect and sector unprotect funct ions may also be
implemented via programming equipment. See the “Sector/Sector
Block Protection and Unpr otect ion” section.
6. If WP#/ACC = V
IL
, the two outermost boot sectors remain
protected. If WP#/ACC = V
IH
, the two outermost boot sector
protection depends on whether they were last protected or
unprotected using the method descr ibed in “Sector/Sector Block
Protection and Unprotection”. If W P# /AC C = V
HH,
all sectors will
be unprotected.
7. Data will be ret ained in pSRAM.
8. Data will be lost in pSRAM.
Operation
(Notes 1, 2)
CE#f CE1#s CE2s OE# WE# Address LB#s UB#s RESET#
WP#/ACC
(Note 4)
DQ7–
DQ0
DQ15–
DQ8
Read from
Flash
(Note 7)
L
HH
LH
A
IN
XX H L/H
D
OUT
High-Z
(Note 8) H L
Write to Flash
(Note 7)
L
HH
HL
A
IN
XX H (Note 4)
D
IN
High-Z
(Note 8) H L
Standby
V
CC
±
0.3 V
HHXX X XX
V
CC
±
0.3 V
H High-Z High-Z
Deep Power-down
Standby
V
CC
±
0.3 V
HLXX X XX
V
CC
±
0.3 V
H High-Z High-Z
Output Disable L L H
HH X X X
H L/H High-Z High-Z
HH X X X
Flash Hardware
Reset
(Note 7)
X
HH
X X X X X L L/H High-Z High-Z
(Note 8) H L
Sector Protect
(Note 5)
(Note 7)
L
HH
HL
SADD, A6 = L,
A1 = H, A0 = L
XX
V
ID
L/H
D
IN
X
(Note 8) H L
Sector
Unprotect
(Note 5)
(Note 7)
L
HH
HL
SADD, A6 = H,
A1 = H, A0 = L
XX
V
ID
(Note 6)
D
IN
X
(Note 8) H L
Temporary
Sector
Unprotect
(Note 7)
X
HH
XX X X X
V
ID
(Note 6)
D
IN
High-Z
(Note 8) H L
Read from pSRAM H L H L H
A
IN
LL
HX
D
OUT
D
OUT
H L High-Z
D
OUT
LH
D
OUT
High-Z
Write to pSRAM H L H X L
A
IN
LL
HX
D
IN
D
IN
H L High-Z
D
IN
LH
D
IN
High-Z
