38 Am29LV800B
PRELIMINARY
ERASE AND PROGRAMMING PERFORMANCE
Notes:
1. Typical program and erase times assume the following conditions: 25
°
C, 3.0 V V
CC
, 1,000,000 cycles. Additionally,
programming typicals assume checkerboard pattern.
2. Under worst case conditions of 90°C, V
CC
= 2.7 V, 1,000,000 cycles.
3. The typical chip programming time is considerably less than the maximum chip programming time listed, since most bytes
program faster than the maximum program times listed.
4. In the pre-programming step of the Embedded Erase algorithm, all bytes are programmed to 00h before erasure.
5. System-level overhead is the time required to execute the two- or four-bus-cycle sequence for the program command. See
Table 5 for further information on command definitions.
6. The device has a guaranteed minimum erase and program cycle endurance of 1,000,000 cycles.
LATCHUP CHARACTERISTICS
Includes all pins except V
CC
. Test conditions: V
CC
= 3.0 V, one pin at a time.
TSOP AND SO PIN CAPACITANCE
Notes:
1. Sampled, not 100% tested.
2. Test conditions T
A
= 25°C, f = 1.0 MHz.
DATA RETENTION
Parameter Typ (Note 1) Max (Note 2) Unit Comments
Sector Erase Time 0.7 15 s
Excludes 00h programming
prior to erasure
Chip Erase Time 14 s
Byte Programming Time 9 300 µs
Excludes system level
overhead (Note 5)
Word Programming Time 11 360 µs
Chip Programming Time
(Note 3)
Byte Mode 9 27 s
Word Mode 5.8 17 s
Description Min Max
Input voltage with respect to V
SS
on all pins except I/O pins
(including A9, OE #, and RESE T#)
–1.0 V 12.5 V
Input voltage with respect to V
SS
on all I/O pins –1.0 V V
CC
+ 1.0 V
V
CC
Current –100 mA +100 mA
Parameter
Symbol Parameter Description Test Setup Typ Max Unit
C
IN
Input Capacitance V
IN
= 0 6 7.5 pF
C
OUT
Output Capacitance V
OUT
= 0 8.5 12 pF
C
IN2
Control Pin Capacitance V
IN
= 0 7.5 9 pF
Parameter Test Conditions Min Unit
Minimum Pattern Data Retention Time
150°C 10 Years
125°C 20 Years
