18 Am29F002/Am29F002N
PRELIMINARY
The DQ5 failure condition may appear if the system
tries to program a “1” to a location that i s pre viously pro-
grammed to “0.” Only an erase operation can change
a “0” back to a “1.” Under this condition, the device
halts the operation, and when the operation has ex-
ceeded the timing limits, DQ5 produces a “1.”
Under both these conditions, the system must issue the
reset command to return the device to reading array
data.
DQ3: Sector Erase Timer
After writing a sector erase command sequence, the
system ma y read DQ3 to determine whether or not an
erase operation has begun. (The sector erase timer
does not apply to the chip erase command.) If addi-
tiona l sector s are selected f or erasure, the ent ire time-
out also applies after each additional sector erase
command. When the time-out is complete, DQ3
switches from “0” to “1.” The system may ignore DQ3
if the s ystem can gua rant ee that t he ti me betw een ad-
ditional sector erase commands will always be less
than 50 µs . See also th e “Sector Erase Command Se-
quence” section.
After the sector erase command sequence is written,
the system should re ad the s tatus on DQ7 (Data# Poll-
ing) or DQ6 (Toggle Bit I) to ensure the device has ac-
cepted the command sequence , and then read DQ3. If
DQ3 is “1”, the internally controlled erase cycle has be-
gun; all further commands (other th an Er ase Su spend)
are ignored until the erase operation is complete. If
DQ3 is “0”, the device will accept additional sector
erase commands. To ensure the command has been
accepted, the s ystem softw are should chec k the status
of DQ3 prior to and following each subsequent sector
erase command. If DQ3 is high on the second status
check, the last command might not have been ac-
cepted. Table 6 shows the outputs for DQ3.
START
No
Yes
Yes
DQ5 = 1?
No
Yes
Toggle Bit
= Toggle?
No
Program/Erase
Operation Not
Complete, Write
Reset Command
Program/Erase
Operation Complete
Read DQ7–DQ0
Toggle Bit
= Toggle?
Read DQ7–DQ0
Twice
Read DQ7–DQ0
Notes:
1. Read toggle bit twice to determine whether or not it is
toggling. See text.
2. Recheck toggle bit because it may stop toggling as DQ5
changes to “1”. See text.
20818C-8
Figure 5. Toggle Bit Algorithm
(Notes
1, 2)
(Note 1)
