4 Am27X020
FUNCTIONAL DESCRIPTION
Read Mode
To obtain data at the device outputs , Chip Enable (CE#)
and Output Enab le (OE#) must be driv en low . CE# con-
trols the po wer to the de vice and is typically used t o se-
lect the device. OE# enab les th e device to output data,
independent of device selection. Addresses must be
stable for at least t
AC C
–t
OE
.
Refer to the Switching
Waveforms section for the timing diag ram.
Standby Mode
The de vice enters the CMOS standby mode when CE#
is at V
CC
± 0.3 V. Maximum V
CC
current is reduc ed to
100 µA. The device enters the TTL-standby mode
when CE# is at V
IH
. Maximum V
CC
current is reduced
to 1.0 mA. When in either standby mode, the device
places its outputs in a high-impedance state, indepen-
dent of the OE# input.
Output OR-Tieing
To accommodate multiple memory connections, a
two-line control function provides:
■ Low memory power dissipation, and
■ Assurance that output bus content ion will not occur .
CE# should be decoded and used as the primary de-
vice-selecting funct ion, whi le OE# be made a common
connection to all devices in the array and connected to
the READ line from the system control bus. This as-
sures that all deselected memory devices are in their
low-power standby mode and that the output pins are
only activ e when data is desired fro m a particular mem-
ory device.
System Applications
During the switch between active and standby condi-
tions, transient current peaks are produced on the ris-
ing and f alling edges of Chip Enab le. The magnitu de of
these transient current peaks is dependent on the out-
put capacitance loading of t he device. At a minim um, a
0.1 µF ceramic capacitor (high frequency, low inherent
inductance) should be used on each device between
V
CC
and V
SS
to minimize transient effects. In addition,
to overcome the voltage drop caused by the inductive
effects of the printed circuit board traces on Express-
ROM de vi ce arrays, a 4.7 µF bulk electr olytic capacitor
should be used between V
CC
and V
SS
for each eight
devices. The location of the capacitor should be close
to where the power supply is connected to the array.
MODE SELECT TABLE
Note:
X = Either V
IH
or V
IL
.
Mode CE# OE# PGM# V
PP
Outputs
Read V
IL
V
IL
XXD
OUT
Output Disable X V
IH
X X High Z
Standby (TTL) V
IH
X X X H igh Z
Standby (CMOS) V
CC
± 0.3 V X X X H igh Z