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AGLN125V5-ZQNG81YI

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型号: AGLN125V5-ZQNG81YI
PDF文件:
  • AGLN125V5-ZQNG81YI PDF文件
  • AGLN125V5-ZQNG81YI PDF在线浏览
功能描述: IGLOO nano Low Power Flash FPGAs with Flash*Freeze Technology
PDF文件大小: 7699.28 Kbytes
PDF页数: 共150页
制造商: MICROSEMI[Microsemi Corporation]
制造商LOGO: MICROSEMI[Microsemi Corporation] LOGO
制造商网址: http://www.microsemi.com
捡单宝AGLN125V5-ZQNG81YI
PDF页面索引
120%
IGLOO nano Low Power Flash FPGAs
Revision 17 2-39
1.2 V LVCMOS (JESD8-12A)
Low-Voltage CMOS for 1.2 V complies with the LVCMOS standard JESD8-12A for general purpose 1.2 V
applications. It uses a 1.2 V input buffer and a push-pull output buffer.
Timing Characteristics
Applies to 1.2 V DC Core Voltage
Table 2-63 • Minimum and Maximum DC Input and Output Levels
1.2 V
LVCMOS VIL VIH VOL VOH IOL IOH IOSL IOSH IIL
1
IIH
2
Drive
Strength
Min.
V
Max.
V
Min.
V
Max.
V
Max.
V
Min.
VmAmA
Max.
mA
3
Max.
mA
3
µA
4
µA
4
1 mA –0.3 0.35 * VCCI 0.65 * VCCI 3.6 0.25 * VCCI 0.75 * VCCI 1 1 10 13 10 10
Notes:
1. I
IL
is the input leakage current per I/O pin over recommended operating conditions where –0.3 < VIN < VIL.
2. I
IH
is the input leakage current per I/O pin over recommended operating conditions where VIH < VIN < VCCI. Input
current is larger when operating outside recommended ranges.
3. Currents are measured at high temperature (100°C junction temperature) and maximum voltage.
4. Currents are measured at 85°C junction temperature.
5. Software default selection highlighted in gray.
Figure 2-11 • AC Loading
Table 2-64 • 1.2 V LVCMOS AC Waveforms, Measuring Points, and Capacitive Loads
Input LOW (V) Input HIGH (V) Measuring Point* (V) C
LOAD
(pF)
01.20.65
Note: *Measuring point = Vtrip. See Table 2-23 on page 2-20 for a complete table of trip points.
Test Point
Test Point
Enable Path
Datapath
5 pF
R = 1 k
R to VCCI for t
LZ
/ t
ZL
/ t
ZLS
R to GND for t
HZ
/ t
ZH
/ t
ZHS
5 pF for t
ZH
/ t
ZHS
/ t
ZL
/ t
ZLS
5 pF for t
HZ
/ t
LZ
Table 2-65 • 1.2 V LVCMOS Low Slew
Commercial-Case Conditions: T
J
= 70°C, Worst-Case VCC = 1.14 V, Worst-Case VCCI = 1.14 V
Drive Strength Speed Grade t
DOUT
t
DP
t
DIN
t
PY
t
PYS
t
EOUT
t
ZL
t
ZH
t
LZ
t
HZ
Units
1 mA STD 1.55 8.30 0.26 1.56 2.27 1.10 7.97 7.54 2.56 2.55 ns
Note: For specific junction temperature and voltage supply levels, refer to Table 2-6 on page 2-6 for derating values.
Table 2-66 • 1.2 V LVCMOS High Slew
Commercial-Case Conditions: T
J
= 70°C, Worst-Case VCC = 1.14 V, Worst-Case VCCI = 1.14 V
Drive Strength Speed Grade t
DOUT
t
DP
t
DIN
t
PY
t
PYS
t
EOUT
t
ZL
t
ZH
t
LZ
t
HZ
Units
1 mA STD 1.55 3.50 0.26 1.56 2.27 1.10 3.37 3.10 2.55 2.66 ns
Note: For specific junction temperature and voltage supply levels, refer to Table 2-6 on page 2-6 for derating values.
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