IGLOO nano Low Power Flash FPGAs
Revision 17 2-87
Embedded FlashROM Characteristics
Timing Characteristics
1.5 V DC Core Voltage
1.2 V DC Core Voltage
Figure 2-41 • Timing Diagram
A
0
A
1
t
SU
t
HOLD
t
SU
t
HOLD
t
SU
t
HOLD
t
CKQ2
t
CKQ2
t
CKQ2
CLK
ddress
Data
D
0
D
0
D
1
Table 2-108 • Embedded FlashROM Access Time
Worst Commercial-Case Conditions: T
J
= 70°C, VCC = 1.425 V
Parameter Description Std. Units
t
SU
Address Setup Time 0.57 ns
t
HOLD
Address Hold Time 0.00 ns
t
CK2Q
Clock to Out 20.90 ns
F
MAX
Maximum Clock Frequency 15 MHz
Table 2-109 • Embedded FlashROM Access Time
Worst Commercial-Case Conditions: T
J
= 70°C, VCC = 1.14 V
Parameter Description Std. Units
t
SU
Address Setup Time 0.59 ns
t
HOLD
Address Hold Time 0.00 ns
t
CK2Q
Clock to Out 35.74 ns
F
MAX
Maximum Clock Frequency 10 MHz