Device Architecture
2-54 Revision 4
Flash Memory Block Characteristics
Figure 2-44 • Reset Timing Diagram
Table 2-25 • Flash Memory Block Timing
Commercial Temperature Range Conditions: T
J
= 70°C, Worst-Case VCC = 1.425 V
Parameter Description –2 –1 Std.
Units
t
CLK2RD
Clock-to-Q in 5-cycle read mode of the Read Data 7.99 9.10 10.70 ns
Clock-to-Q in 6-cycle read mode of the Read Data 5.03 5.73 6.74 ns
t
CLK2BUSY
Clock-to-Q in 5-cycle read mode of BUSY 4.95 5.63 6.62 ns
Clock-to-Q in 6-cycle read mode of BUSY 4.45 5.07 5.96 ns
t
CLK2STATUS
Clock-to-Status in 5-cycle read mode 11.24 12.81 15.06 ns
Clock-to-Status in 6-cycle read mode 4.48 5.10 6.00 ns
t
DSUNVM
Data Input Setup time for the Control Logic 1.92 2.19 2.57 ns
t
DHNVM
Data Input Hold time for the Control Logic 0.00 0.00 0.00 ns
t
ASUNVM
Address Input Setup time for the Control Logic 2.76 3.14 3.69 ns
t
AHNVM
Address Input Hold time for the Control Logic 0.00 0.00 0.00 ns
t
SUDWNVM
Data Width Setup time for the Control Logic 1.85 2.11 2.48 ns
t
HDDWNVM
Data Width Hold time for the Control Logic 0.00 0.00 0.00 ns
t
SURENNVM
Read Enable Setup time for the Control Logic 3.85 4.39 5.16 ns
t
HDRENNVM
Read Enable Hold Time for the Control Logic 0.00 0.00 0.00 ns
t
SUWENNVM
Write Enable Setup time for the Control Logic 2.37 2.69 3.17 ns
t
HDWENNVM
Write Enable Hold Time for the Control Logic 0.00 0.00 0.00 ns
t
SUPROGNVM
Program Setup time for the Control Logic 2.16 2.46 2.89 ns
t
HDPROGNVM
Program Hold time for the Control Logic 0.00 0.00 0.00 ns
t
SUSPAREPAGE
SparePage Setup time for the Control Logic 3.74 4.26 5.01 ns
t
HDSPAREPAGE
SparePage Hold time for the Control Logic 0.00 0.00 0.00 ns
t
SUAUXBLK
Auxiliary Block Setup Time for the Control Logic 3.74 4.26 5.00 ns
t
HDAUXBLK
Auxiliary Block Hold Time for the Control Logic 0.00 0.00 0.00 ns
t
SURDNEXT
ReadNext Setup Time for the Control Logic 2.17 2.47 2.90 ns
t
HDRDNEXT
ReadNext Hold Time for the Control Logic 0.00 0.00 0.00 ns
t
SUERASEPG
Erase Page Setup Time for the Control Logic 3.76 4.28 5.03 ns
t
HDERASEPG
Erase Page Hold Time for the Control Logic 0.00 0.00 0.00 ns
t
SUUNPROTECTPG
Unprotect Page Setup Time for the Control Logic 2.01 2.29 2.69 ns
t
HDUNPROTECTPG
Unprotect Page Hold Time for the Control Logic 0.00 0.00 0.00 ns
t
SUDISCARDPG
Discard Page Setup Time for the Control Logic 1.88 2.14 2.52 ns
t
HDDISCARDPG
Discard Page Hold Time for the Control Logic 0.00 0.00 0.00 ns
t
SUOVERWRPRO
Overwrite Protect Setup Time for the Control Logic 1.64 1.86 2.19 ns
t
HDOVERWRPRO
Overwrite Protect Hold Time for the Control Logic 0.00 0.00 0.00 ns
CLK
RESET
Active Low, Asynchronous
BUSY