Revision 4 1-1
1 – Fusion Device Family Overview
Introduction
The Fusion mixed signal FPGA satisfies the demand from system architects for a device that simplifies
design and unleashes their creativity. As the world’s first mixed signal programmable logic family, Fusion
integrates mixed signal analog, flash memory, and FPGA fabric in a monolithic device. Fusion devices
enable designers to quickly move from concept to completed design and then deliver feature-rich
systems to market. This new technology takes advantage of the unique properties of Microsemi flash-
based FPGAs, including a high-isolation, triple-well process and the ability to support high-voltage
transistors to meet the demanding requirements of mixed signal system design.
Fusion mixed signal FPGAs bring the benefits of programmable logic to many application areas,
including power management, smart battery charging, clock generation and management, and motor
control. Until now, these applications have only been implemented with costly and space-consuming
discrete analog components or mixed signal ASIC solutions. Fusion mixed signal FPGAs present new
capabilities for system development by allowing designers to integrate a wide range of functionality into a
single device, while at the same time offering the flexibility of upgrades late in the manufacturing process
or after the device is in the field. Fusion devices provide an excellent alternative to costly and time-
consuming mixed signal ASIC designs. In addition, when used in conjunction with the ARM Cortex-M1
processor, Fusion technology represents the definitive mixed signal FPGA platform.
Flash-based Fusion devices are Instant On. As soon as system power is applied and within normal
operating specifications, Fusion devices are working. Fusion devices have a 128-bit flash-based lock and
industry-leading AES decryption, used to secure programmed intellectual property (IP) and configuration
data. Fusion devices are the most comprehensive single-chip analog and digital programmable logic
solution available today.
To support this new ground-breaking technology, Microsemi has developed a series of major tool
innovations to help maximize designer productivity. Implemented as extensions to the popular Microsemi
Libero
®
System-on-Chip (SoC) software, these new tools allow designers to easily instantiate and
configure peripherals within a design, establish links between peripherals, create or import building
blocks or reference designs, and perform hardware verification. This tool suite will also add
comprehensive hardware/software debug capability as well as a suite of utilities to simplify development
of embedded soft-processor-based solutions.
General Description
The Fusion family, based on the highly successful ProASIC
®
3 and ProASIC3E flash FPGA architecture,
has been designed as a high-performance, programmable, mixed signal platform. By combining an
advanced flash FPGA core with flash memory blocks and analog peripherals, Fusion devices
dramatically simplify system design and, as a result, dramatically reduce overall system cost and board
space.
The state-of-the-art flash memory technology offers high-density integrated flash memory blocks,
enabling savings in cost, power, and board area relative to external flash solutions, while providing
increased flexibility and performance. The flash memory blocks and integrated analog peripherals enable
true mixed-mode programmable logic designs. Two examples are using an on-chip soft processor to
implement a fully functional flash MCU and using high-speed FPGA logic to offer system and power
supervisory capabilities. Instant On, and capable of operating from a single 3.3 V supply, the Fusion
family is ideally suited for system management and control applications.
The devices in the Fusion family are categorized by FPGA core density. Each family member contains
many peripherals, including flash memory blocks, an analog-to-digital-converter (ADC), high-drive
outputs, both RC and crystal oscillators, and a real-time counter (RTC). This provides the user with a
high level of flexibility and integration to support a wide variety of mixed signal applications. The flash
memory block capacity ranges from 2 Mbits to 8 Mbits. The integrated 12-bit ADC supports up to 30
independently configurable input channels.
