Device Architecture
2-206 Revision 4
HSTL Class I
High-Speed Transceiver Logic is a general-purpose high-speed 1.5 V bus standard (EIA/JESD8-6).
Fusion devices support Class I. This provides a differential amplifier input buffer and a push-pull output
buffer.
Timing Characteristics
Table 2-150 • Minimum and Maximum DC Input and Output Levels
HSTL
Class I VIL VIH VOL VOH IOL IOH IOSL IOSH IIL
1
IIH
2
Drive
Strength
Min.
V
Max.
V
Min.
V
Max.
V
Max.
V
Min.
VmAmA
Max.
mA
3
Max.
mA
3
µA
4
µA
4
8 mA –0.3 VREF – 0.1 VREF + 0.1 3.6 0.4 VCCI – 0.4 8 8 39 32 10 10
Notes:
1. IIL is the input leakage current per I/O pin over recommended operation conditions where –0.3 V < VIN < VIL.
2. IIH is the input leakage current per I/O pin over recommended operating conditions VIH < VIN < VCCI. Input current is
larger when operating outside recommended ranges.
3. Currents are measured at high temperature (100°C junction temperature) and maximum voltage.
4. Currents are measured at 85°C junction temperature.
Figure 2-128 • AC Loading
Table 2-151 • AC Waveforms, Measuring Points, and Capacitive Loads
Input Low (V) Input High (V) Measuring Point* (V) VREF (typ.) (V) VTT (typ.) (V) C
LOAD
(pF)
VREF – 0.1 VREF + 0.1 0.75 0.75 0.75 20
Note: *Measuring point = Vtrip. See Table 2-90 on page 2-169 for a complete table of trip points.
est Point
20 p
50
HSTL
Class I
Table 2-152 • HSTL Class I
Commercial Temperature Range Conditions: T
J
= 70°C, Worst-Case VCC = 1.425 V,
Worst-Case VCCI = 1.4 V, VREF = 0.75 V
Speed
Grade t
DOUT
t
DP
t
DIN
t
PY
t
EOUT
t
ZL
t
ZH
t
LZ
t
HZ
t
ZLS
t
ZHS
Units
Std. 0.66 3.18 0.04 2.12 0.43 3.24 3.14 5.47 5.38 ns
–1 0.56 2.70 0.04 1.81 0.36 2.75 2.67 4.66 4.58 ns
–2 0.49 2.37 0.03 1.59 0.32 2.42 2.35 4.09 4.02 ns
Note: For the derating values at specific junction temperature and voltage supply levels, refer to Table 3-7 on
page 3-9.