Device Architecture
2-4 Revision 4
Figure 2-4 • Combinatorial Timing Model and Waveforms
t
PD
t
PD
t
PD
VCCA
VCCA
t
PD
t
PD
VCCA
t
PD
= MAX(t
PD(RR)
, t
PD(RF)
, t
PD(FF)
, t
PD(FR)
)
where edges are applicable for the
particular combinatorial cell
NAND2 or
Any Combinatorial
Logic
A
B
Y
(RR)
A, B, C
OUT
50%
GND
(FF)
50%
50%
50%
GND
(RF)
50%
(FR)
50%
OUT
GND