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AFS1500-2FGG256PP

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型号: AFS1500-2FGG256PP
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  • AFS1500-2FGG256PP PDF文件
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功能描述: Fusion Family of Mixed Signal FPGAs
PDF文件大小: 18780.44 Kbytes
PDF页数: 共334页
制造商: MICROSEMI[Microsemi Corporation]
制造商LOGO: MICROSEMI[Microsemi Corporation] LOGO
制造商网址: http://www.microsemi.com
捡单宝AFS1500-2FGG256PP
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120%
Device Architecture
2-154 Revision 4
Weak Pull-Up and Weak Pull-Down Resistors
Fusion devices support optional weak pull-up and pull-down resistors for each I/O pin. When the I/O is
pulled up, it is connected to the VCCI of its corresponding I/O bank. When it is pulled down, it is
connected to GND. Refer to Table 2-97 on page 2-174 for more information.
Slew Rate Control and Drive Strength
Fusion devices support output slew rate control: high and low. The high slew rate option is recommended
to minimize the propagation delay. This high-speed option may introduce noise into the system if
appropriate signal integrity measures are not adopted. Selecting a low slew rate reduces this kind of
noise but adds some delays in the system. Low slew rate is recommended when bus transients are
expected. Drive strength should also be selected according to the design requirements and noise
immunity of the system.
The output slew rate and multiple drive strength controls are available in LVTTL/LVCMOS 3.3 V,
LVCMOS 2.5 V, LVCMOS 2.5 V / 5.0 V input, LVCMOS 1.8 V, and LVCMOS 1.5 V. All other I/O
standards have a high output slew rate by default.
For Fusion slew rate and drive strength specifications, refer to the appropriate I/O bank table:
Fusion Standard I/O (Table 2-78 on page 2-155)
Fusion Advanced I/O (Table 2-79 on page 2-155)
Fusion Pro I/O (Table 2-80 on page 2-155)
Table 2-83 on page 2-158 lists the default values for the above selectable I/O attributes as well as those
that are preset for each I/O standard.
Figure 2-112 • Timing Diagram (with skew circuit selected)
EN (b1)
EN (b2)
Transmitter 1: ON
ENABLE (t2)
Transmitter 2: ON
Transmitter 2: OFF
ENABLE (t1)
Result: No Bus Contention
Transmitter 1: OFF Transmitter 1: OFF
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