Fusion Family of Mixed Signal FPGAs
Revision 4 2-137
Table 2-68 • I/O Bank Support by Device
I/O Bank AFS090 AFS250 AFS600 AFS1500
Standard I/O N N – –
Advanced I/O E, W E, W E, W E, W
Pro I/O – – N N
Analog QuadSSSS
Note: E = East side of the device
W = West side of the device
N = North side of the device
S = South side of the device
Table 2-69 • Fusion VCCI Voltages and Compatible Standards
VCCI (typical) Compatible Standards
3.3 V LVTTL/LVCMOS 3.3, PCI 3.3, SSTL3 (Class I and II),* GTL+ 3.3, GTL 3.3,* LVPECL
2.5 V LVCMOS 2.5, LVCMOS 2.5/5.0, SSTL2 (Class I and II),* GTL+ 2.5,* GTL 2.5,* LVDS, BLVDS, M-
LVDS
1.8 V LVCMOS 1.8
1.5 V LVCMOS 1.5, HSTL (Class I),* HSTL (Class II)*
Note: *I/O standard supported by Pro I/O banks.
Table 2-70 • Fusion VREF Voltages and Compatible Standards*
VREF
(typical) Compatible Standards
1.5 V SSTL3 (Class I and II)
1.25 V SSTL2 (Class I and II)
1.0 V GTL+ 2.5, GTL+ 3.3
0.8 V GTL 2.5, GTL 3.3
0.75 V HSTL (Class I), HSTL (Class II)
Note: *I/O standards supported by Pro I/O banks.