Data Sheet AD9704/AD9705/AD9706/AD9707
Rev. D | Page 37 of 42
POWER DISSIPATION
The power dissipation, P
D
, of the
AD9704/AD9705/AD9706/
AD9707 is dependent on several factors that include
• The power supply voltages (AVDD, CLKVDD, and DVDD)
• The full-scale current output, I
OUTFS
• The update rate, f
CLOCK
• The reconstructed digital input waveform
Power dissipation is directly proportional to the analog supply
current, I
AVDD
, and the digital supply current, I
DVDD
. I
AVD D
is equal to
a fixed current plus I
OUTFS
, as shown in Figure 80. I
DVDD
is proportional
to f
CLOCK
and increases with increasing analog output frequencies.
Figure 82 shows I
DVDD
as a function of full-scale sine wave output
ratios (f
OUT
/f
CLOCK
) for various update rates with DVDD = 3.3 V.
I
CLKVDD
is directly proportional to f
CLOCK
and is higher for differential
clock operation than for single-ended operation, as shown in
Figure 84. This difference in clock current is due primarily to the
differential clock receiver, which is disabled in single-ended
clock mode.
10
9
8
7
6
5
4
3
2
1
0
1 2 3 4 5
I
AVDD
(mA)
I
OUTFS
(mA)
05926-080
Figure 80. I
AVDD
vs. I
OUTFS
at AVDD = 3.3 V
0
1.00 1.25 1.50 1.75 2.00
I
AVDD
(mA)
I
OUTFS
(mA)
05926-102
1
3
2
4
5
6
Figure 81. I
AVDD
vs. I
OUTFS
at AVDD = 1.8 V
10
9
8
7
6
5
4
3
2
1
0
0.01 0.1 1
I
DVDD
(mA)
f
OUT
/
f
CLOCK
05926-081
f
CLOCK
= 75MSPS
f
CLOCK
= 25MSPS
f
CLOCK
= 10MSPS
f
CLOCK
= 125MSPS
f
CLOCK
= 175MSPS
Figure 82. I
DVDD
vs. f
OUT
/f
CLOCK
Ratio at DVDD = 3.3 V
2.5
0
0.01 0.1 1
I
DVDD
(mA)
f
OUT
/f
CLOCK
05926-098
0.5
1.0
1.5
2.0
2.5
f
CLOCK
= 80MSPS
f
CLOCK
= 10MSPS
f
CLOCK
= 25MSPS
f
CLOCK
= 50MSPS
Figure 83. I
DVDD
vs. f
OUT
/f
CLOCK
Ratio at DVDD = 1.8 V
5
4
3
2
1
0
0 10050 150 200
I
CLKVDD
(mA)
f
CLOCK
(MSPS)
DIFF
SE
05926-082
Figure 84. I
CLKVDD
vs. f
CLOCK
at CLKVDD = 3.3 V
