–2–
AD5200/AD5201–SPECIFICATIONS
AD5200 ELECTRICAL CHARACTERISTICS
Parameter Symbol Conditions Min Typ
1
Max Unit
DC CHARACTERISTICS RHEOSTAT MODE
Resistor Differential Nonlinearity
2
R-DNL R
WB
, V
A
= No Connect –1 ± 0.25 +1 LSB
Resistor Integral Nonlinearity
2
R-INL R
WB
, V
A
= No Connect –2 ± 0.5 +2 LSB
Nominal Resistor Tolerance
3
∆R
AB
T
A
= 25°C –30 +30 %
Resistance Temperature Coefficient R
AB
/∆TV
AB
= V
DD
, Wiper = No Connect 500 ppm/ °C
Wiper Resistance R
W
V
DD
= 5 V 50 100 Ω
DC CHARACTERISTICS POTENTIOMETER DIVIDER MODE (Specifications apply to all VRs.)
Resolution N 8 Bits
Differential Nonlinearity
4
DNL –1 ± 1/4 +1 LSB
Integral Nonlinearity
4
INL –2 ± 1/2 +2 LSB
Voltage Divider Temperature Coefficient ∆V
W
/∆T Code = 80
H
5 ppm/ °C
Full-Scale Error V
WFSE
Code = FF
H
–1.5 –0.5 0 LSB
Zero-Scale Error V
WZSE
Code = 00
H
0 +0.5 +1.5 LSB
RESISTOR TERMINALS
Voltage Range
5
V
A,
B,
W
V
SS
V
DD
V
Capacitance
6
A, B C
A,
B
f = 1 MHz, Measured to GND, Code = 80
H
45 pF
Capacitance
6
WC
W
f = 1 MHz, Measured to GND, Code = 80
H
60 pF
Shutdown Supply Current
7
I
DD_SD
V
DD
= 5.5 V 0.01 5 µA
Common-Mode Leakage I
CM
V
A
= V
B
= V
DD
/2 1 nA
DIGITAL INPUTS AND OUTPUTS
Input Logic High V
IH
2.4 V
Input Logic Low V
IL
0.8 V
Input Logic High V
IH
V
DD
= 3 V, V
SS
= 0 V 2.1 V
Input Logic Low V
IL
V
DD
= 3 V, V
SS
= 0 V 0.6 V
Input Current I
IL
V
IN
= 0 V or 5 V ±1 µA
Input Capacitance
6
C
IL
5pF
POWER SUPPLIES
Logic Supply V
LOGIC
2.7 5.5 V
Power Single-Supply Range V
DD
RANGE
V
SS
= 0 V –0.3 5.5 V
Power Dual-Supply Range V
DD/SS
RANGE
± 2.3 ± 2.7 V
Positive Supply Current I
DD
V
IH
= +5 V or V
IL
= 0 V 15 40 µA
Negative Supply Current I
SS
V
SS
= –5 V 15 40 µA
Power Dissipation
8
P
DISS
V
IH
= +5 V or V
IL
= 0 V, V
DD
= +5 V, V
SS
= 0 V 0.2 mW
Power Supply Sensitivity PSS ∆V
DD
= +5 V ± 10%, Code = Midscale –0.01 0.001 +0.01 %/%
DYNAMIC CHARACTERISTICS
6, 9
Bandwidth –3 dB BW_10 kΩ R
AB
= 10 kΩ, Code = 80
H
600 kHz
BW_50 kΩ R
AB
= 50 kΩ, Code = 80
H
100 kHz
Total Harmonic Distortion THD
W
V
A
= 1 V rms, V
B
= 0 V, f = 1 kHz, R
AB
= 10 kΩ 0.003 %
V
W
Settling Time (10 kΩ/50 kΩ)t
S
V
A
= 5 V, V
B
= 0 V, ± 1 LSB Error Band 2/9 µs
Resistor Noise Voltage Density e
N_WB
R
WB
= 5 kΩ, RS = 0 9 nV√Hz
NOTES
1
Typicals represent average readings at 25°C and V
DD
= 5 V, V
SS
= 0 V.
2
Resistor position nonlinearity error R-INL is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper posi-
tions. R-DNL measures the relative step change from ideal between successive tap positions. Parts are guaranteed monotonic. I
W
= V
DD
/R for both V
DD
= +2.7 V,
V
SS
= –2.7 V.
3
V
AB
= V
DD
, Wiper (V
W
) = No connect.
4
INL and DNL are measured at V
W
with the RDAC configured as a potentiometer divider similar to a voltage output D/A converter. V
A
= V
DD
and V
B
= 0 V. DNL
specification limits of ± 1 LSB maximum are Guaranteed Monotonic operating conditions.
5
Resistor Terminals A, B, W have no limitations on polarity with respect to each other.
6
Guaranteed by design and not subject to production test.
7
Measured at the A terminal. A terminal is open-circuited in shutdown mode.
8
P
DISS
is calculated from (I
DD
× V
DD
). CMOS logic level inputs result in minimum power dissipation.
9
All dynamic characteristics use V
DD
= 5 V, V
SS
= 0 V.
Specifications subject to change without notice.
(V
DD
= 5 V 10%, or 3 V 10%, V
SS
= 0 V, V
A
= +V
DD
, V
B
= 0 V,
–40C < T
A
< +85C unless otherwise noted.)
