AD5200/AD5201
–14–
TEST CIRCUITS
Figures 6 to 14 define the test conditions used in the product
specification table.
V
MS
A
W
B
DUT
V+
V+ = V
DD
1 LSB = V+/2
N
Figure 6. Potentiometer Divider Nonlinearity Error Test
Circuit (INL, DNL)
V
MS
A
W
B
DUT
NO CONNECT
I
W
Figure 7. Resistor Position Nonlinearity Error
(Rheostat Operation; R-INL, R-DNL)
V
MS1
A
W
B
DUT
I
W
= V
DD
/R
NOMINAL
V
MS2
V
W
R
W
= [V
MS1
– V
MS2
]/I
W
Figure 8. Wiper Resistance Test Circuit
V
MS
%
V
DD
%
PSS (%/%) =
V+ = V
DD
10%
PSRR (dB) = 20 LOG
V
MS
V
DD
V
MS
A
W
B
V+
V
DD
V
A
Figure 9. Power Supply Sensitivity Test Circuit
(PSS, PSRR)
OP279
W
5V
B
V
OUT
OFFSET
GND
OFFSET BIAS
A DUT
V
IN
Figure 10. Inverting Gain Test Circuit
OFFSET BIAS
B
OFFSET
GND
A DUT
OP279
W
5V
V
OUT
V
IN
Figure 11. Noninverting Gain Test Circuit
OP42
V
OUT
V
IN
+15V
OFFSET
GND
–15V
W
B
A
2.5V
Figure 12. Gain vs. Frequency Test Circuit
W
B
V
SS
TO V
DD
DUT
I
SW
CODE = OO
H
R
SW
=
0.1V
I
SW
0.1V
+
–
Figure 13. Incremental ON Resistance Test Circuit
I
CM
A
W
B
NC
GND
NC
V
SS
V
DD
DUT
V
CM
NC = NO CONNECT
Figure 14. Common-Mode Leakage Current Test Circuit
