40MX and 42MX FPGA Families
Revision 11 1-49
Table 1-31 • A40MX04 Timing Characteristics (Nominal 3.3 V Operation)
(Worst-Case Commercial Conditions, VCC = 3.0 V, T
J
= 70°C)
–3 Speed –2 Speed –1 Speed Std Sp eed –F Speed
UnitsParame ter / Description Min. Max. Min. Max. Min. Max. Min. Max. Min. Max.
Logic Module Propagation Delays
t
PD1
Single Module 1.7 2.0 2.3 2.7 3.7 ns
t
PD2
Dual-Module Macros 3.7 4.3 4.9 5.7 8.0 ns
t
CO
Sequential Clock-to-Q 1.7 2.0 2.3 2.7 3.7 ns
t
GO
Latch G-to-Q 1.7 2.0 2.3 2.7 3.7 ns
t
RS
Flip-Flop (Latch) Reset-to-Q 1.7 2.0 2.3 2.7 3.7 ns
Logic Module Predicted Routing Delays
1
t
RD1
FO = 1 Routing Delay 1.9 2.2 2.5 3.0 4.2 ns
t
RD2
FO = 2 Routing Delay 2.7 3.1 3.5 4.1 5.7 ns
t
RD3
FO = 3 Routing Delay 3.4 3.9 4.4 5.2 7.3 ns
t
RD4
FO = 4 Routing Delay 4.1 4.8 5.4 6.3 8.9 ns
t
RD8
FO = 8 Routing Delay 7.1 8.1 9.2 10.9 15.2 ns
Logic Module Sequential Timing
2
t
SUD
Flip-Flop (Latch)
Data Input Set-Up
4.3 5.0 5.6 6.6 9.2 ns
t
HD
3
Flip-Flop (Latch) Data Input Hold 0.0 0.0 0.0 0.0 0.0 ns
t
SUENA
Flip-Flop (Latch) Enable Set-Up 4.3 5.0 5.6 6.6 9.2 ns
t
HENA
Flip-Flop (Latch) Enable Hold 0.0 0.0 0.0 0.0 0.0 ns
t
WCLKA
Flip-Flop (Latch)
Clock Active Pulse Width
4.6 5.3 5.6 7.0 9.8 ns
t
WASYN
Flip-Flop (Latch)
Asynchronous Pulse Width
4.6 5.3 5.6 7.0 9.8 ns
t
A
Flip-Flop Clock Input Period 6 .8 7.8 8.9 10.4 14.6 ns
f
MAX
Flip-Flop (Latch) Clock Frequency
(FO = 128)
109 101 92 80 48 MHz
Input Module Propagation Delays
t
INYH
Pad-to-Y HIGH 1.0 1.1 1.3 1.5 2.1 ns
t
INYL
Pad-to-Y LOW 0.9 1.0 1.1 1.3 1.9 ns
Notes:
1. Routing delays are for typical designs across worst-case operating conditions. These parameters should be used for
estimating device performance. Post-route timing analysis or simulation is required to determine actual performance.
2. Set-up times assume fanout of 3. Further testing information can be obtained from the Timer utility.
3. The hold time for the DFME1A macro may be greater than 0 ns. Use the Timer tool from the Designer software to check
the hold time for th is ma cro.
4. Delays based on 35 pF loading.