ProASIC3 Flash Family FPGAs
Revision 13 2-63
3.3 V PCI, 3.3 V PCI-X
Peripheral Component Interface for 3.3 V standard specifies support for 33 MHz and 66 MHz PCI Bus
applications.
AC loadings are defined per the PCI/PCI-X specifications for the datapath; Microsemi loadings for enable
path characterization are described in Figure 2-10.
AC loadings are defined per PCI/PCI-X specifications for the datapath; Microsemi loading for tristate is
described in Tab l e 2-87.
Table 2-85 • 1.5 V LVCMOS Low Slew
Commercial-Case Conditions: T
J
= 70°C, Worst-Case VCC = 1.425 V, Worst-Case VCCI = 3.0 V
Applicable to Standard I/O Banks
Drive
Strength
Speed
Grade t
DOUT
t
DP
t
DIN
t
PY
t
EOUT
t
ZL
t
ZH
t
LZ
t
HZ
Units
2 mA Std. 0.66 12.33 0.04 1.42 0.43 11.79 12.33 2.45 2.32 ns
–1 0.56 10.49 0.04 1.21 0.36 10.03 10.49 2.08 1.98 ns
–2 0.49 9.21 0.03 1.06 0.32 8.81 9.21 1.83 1.73 ns
Note: For specific junction temperature and voltage supply levels, refer to Table 2-6 on page 2-6 for derating values.
Table 2-86 • Minimum and Maximum DC Input and Output Levels
3.3 V PCI/PCI-X VIL VIH VOL VOH IOL IOH IOSL IOSH IIL IIH
Drive Strength
Min.
V
Max.
V
Min.
V
Max.
V
Max,.
V
Min.
VmAmA
Max.
mA
1
Max.
mA
1
µA
2
µA
2
Per PCI specification Per PCI curves 10 10
Notes:
1. Currents are measured at high temperature (100°C junction temperature) and maximum voltage.
2. Currents are measured at 85°C junction temperature.
Figure 2-10 • AC Loading
Test Point
Enable Path
R to VCCI for t
LZ
/ t
ZL
/ t
ZLS
10 pF for t
ZH
/ t
ZHS
/ t
ZL
/ t
ZLS
5 pF for t
HZ
/ t
LZ
R to GND for t
HZ
/ t
ZH
/ t
ZHS
R = 1 k
Test Point
Datapath
R = 25
R to VCCI for t
DP
(F)
R to GND for t
DP
(R)
Table 2-87 • AC Waveforms, Measuring Points, and Capacitive Loads
Input Low (V) Input High (V) Measuring Point* (V) C
LOAD
(pF)
0 3.3 0.285 * VCCI for t
DP(R)
0.615 * VCCI for t
DP(F)
10
Note: *Measuring point = V
trip.
See Table 2-22 on page 2-21 for a complete table of trip points.