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A3P250-2TQ144PP

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型号: A3P250-2TQ144PP
PDF文件:
  • A3P250-2TQ144PP PDF文件
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功能描述: ProASIC3 Flash Family FPGAs with Optional Soft ARM Support
PDF文件大小: 10669.38 Kbytes
PDF页数: 共220页
制造商: MICROSEMI[Microsemi Corporation]
制造商LOGO: MICROSEMI[Microsemi Corporation] LOGO
制造商网址: http://www.microsemi.com
捡单宝A3P250-2TQ144PP
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120%
ProASIC3 DC and Switching Characteristics
2-8 Revision 13
Table 2-11 • Summary of I/O Output Buffer Power (per pin) – Default I/O Software Settings
1
Applicable to Advanced I/O Banks
C
LOAD
(pF) VCCI (V)
Static Power
PDC3 (mW)
2
Dynamic Power
PAC10 (µW/MHz)
3
Single-Ended
3.3 V LVTTL / 3.3 V LVCMOS 35 3.3 468.67
3.3 V LVCMOS Wide Range
4
35 3.3 468.67
2.5 V LVCMOS 35 2.5 267.48
1.8 V LVCMOS 35 1.8 149.46
1.5 V LVCMOS
(JESD8-11)
35 1.5 103.12
3.3 V PCI 10 3.3 201.02
3.3 V PCI-X 10 3.3 201.02
Differential
LVDS 2.5 7.74 88.92
LVPECL 3.3 19.54 166.52
Notes:
1. Dynamic power consumption is given for standard load and software default drive strength and output slew.
2. PDC3 is the static power (where applicable) measured on VCCI.
3. PAC10 is the total dynamic power measured on VCC and VCCI.
4. All LVCMOS 3.3 V software macros support LVCMOS 3.3 V wide range as specified in the JESD8-B specification.
Table 2-12 • Summary of I/O Output Buffer Power (Per Pin) – Default I/O Software Settings
1
Applicable to Standard Plus I/O Banks
C
LOAD
(pF) VCCI (V)
Static Power
PDC3 (mW)
2
Dynamic Power
PAC10 (µW/MHz)
3
Single-Ended
3.3 V LVTTL / 3.3 V LVCMOS 35 3.3 452.67
3.3 V LVCMOS Wide Range
4
35 3.3 452.67
2.5 V LVCMOS 35 2.5 258.32
1.8 V LVCMOS 35 1.8 133.59
1.5 V LVCMOS (JESD8-11) 35 1.5 92.84
3.3 V PCI 10 3.3 184.92
3.3 V PCI-X 10 3.3 184.92
Notes:
1. Dynamic power consumption is given for standard load and software default drive strength and output slew.
2. P
DC3
is the static power (where applicable) measured on VMV.
3. P
AC10
is the total dynamic power measured on VCC and VMV.
4. All LVCMOS 3.3 V software macros support LVCMOS 3.3 V wide range as specified in the JESD8-B specification.
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