Datasheet Information
5-4 Revision 13
Revision Changes Page
Revision 9 (Oct 2009)
Product Brief v1.3
The CS121 package was added to table under "Features and Benefits" section,
the "I/Os Per Package 1" table, Table 1 • ProASIC3 FPGAs Package Sizes
Dimensions, "ProASIC3 Ordering Information", and the "Temperature Grade
Offerings" table.
I – IV
"ProASIC3 Ordering Information" was revised to include the fact that some RoHS
compliant packages are halogen-free.
III
Packaging v1.5 The "CS121" figure and pin table for A3P060 are new. 4-15
Revision 8 (Aug 2009)
Product Brief v1.2
All references to M7 devices (CoreMP7) and speed grade –F were removed from
this document.
N/A
Table 1-1 • I/O Standards Supported is new. 1-7
The "I/Os with Advanced I/O Standards" section was revised to add definitions of
hot-swap and cold-sparing.
1-7
DC and Switching
Characteristics v1.4
3.3 V LVCMOS and 1.2 V LVCMOS Wide Range support was added to the
datasheet. This affects all tables that contained 3.3 V LVCMOS and 1.2 V
LVCMOS data.
N/A
I
IL
and I
IH
input leakage current information was added to all "Minimum and
Maximum DC Input and Output Levels" tables.
N/A
–F was removed from the datasheet. The speed grade is no longer supported. N/A
The notes in Table 2-2 • Recommended Operating Conditions 1,2 were updated. 2-2
Table 2-4 • Overshoot and Undershoot Limits 1 was updated. 2-3
Table 2-6 • Temperature and Voltage Derating Factors for Timing Delays was
updated.
2-6
In Table 2-116 • RAM4K9, the following specifications were removed:
t
WRO
t
CCKH
2-94
In Table 2-117 • RAM512X18, the following specifications were removed:
t
WRO
t
CCKH
2-96
In the title of Table 2-74 • 1.8 V LVCMOS High Slew, VCCI had a typo. It was
changed from 3.0 V to 1.7 V.
2-57
Revision 7 (Feb 2009)
Product Brief v1.1
The "Advanced I/O" section was revised to add a bullet regarding wide range
power supply voltage support.
I
The table under "Features and Benefits" section, was updated to include a value
for typical equivalent macrocells for A3P250.
I
The QN48 package was added to the following tables: the table under "Features
and Benefits" section, "I/Os Per Package 1" "ProASIC3 FPGAs Package Sizes
Dimensions", and "Temperature Grade Offerings".
The number of singled-ended I/Os for QN68 was added to the "I/Os Per
Package 1" table.
N/A
The "Wide Range I/O Support" section is new. 1-7
Revision 6 (Dec 2008)
Packaging v1.4
The "QN48" section is new. 4-1
The "QN68" pin table for A3P030 is new. 4-5