SmartFusion Customizable System-on-Chip (cSoC)
Revision 10 2-33
Timing Characteristics
Table 2-44 • 2.5 V LVCMOS High Slew
Worst Commercial-Case Conditions: T
J
= 85°C, Worst-Case VCC = 1.425 V,
Worst-Case VCCxxxxIOBx = 2.3 V
Applicable to FPGA I/O Banks, I/O Assigned to EMC I/O Pins
Drive
Strength
Speed
Grade t
DOUT
t
DP
t
DIN
t
PY
t
EOUT
t
ZL
t
ZH
t
LZ
t
HZ
t
ZLS
t
ZHS
Units
4 mA Std. 0.55 8.10 0.04 1.23 0.39 7.37 8.10 2.54 2.17 9.43 10.15 ns
–1 0.46 6.75 0.03 1.03 0.32 6.14 6.75 2.12 1.81 7.85 8.46 ns
8 mA Std. 0.55 4.85 0.04 1.23 0.39 4.76 4.85 2.90 2.83 6.82 6.91 ns
–1 0.46 4.04 0.03 1.03 0.32 3.97 4.04 2.42 2.36 5.68 5.76 ns
12 mA Std. 0.60 3.28 0.04 1.23 0.39 3.46 3.23 3.15 3.24 5.52 5.29 ns
–1 0.50 2.73 0.03 1.03 0.32 2.88 2.69 2.62 2.70 4.60 4.41 ns
16 mA Std. 0.60 3.09 0.04 1.23 0.39 3.27 2.88 3.20 3.35 5.33 4.94 ns
–1 0.50 2.57 0.03 1.03 0.32 2.72 2.40 2.67 2.79 4.44 4.12 ns
24 mA Std. 0.60 2.95 0.04 1.23 0.39 3.01 2.31 3.27 3.76 5.07 4.37 ns
–1 0.50 2.46 0.03 1.03 0.32 2.51 1.93 2.73 3.13 4.22 3.64 ns
Notes:
1. Software default selection highlighted in gray.
2. For specific junction temperature and voltage supply levels, refer to Table 2-7 on page 2-9 for derating values.
Table 2-45 • 2.5 V LVCMOS Low Slew
Worst Commercial-Case Conditions: T
J
= 85°C, Worst-Case VCC = 1.425 V,
Worst-Case VCCxxxxIOBx = 2.3 V
Applicable to FPGA I/O Banks, I/O Assigned to EMC I/O Pins
Drive
Strength
Speed
Grade t
DOUT
t
DP
t
DIN
t
PY
t
EOUT
t
ZL
t
ZH
t
LZ
t
HZ
t
ZLS
t
ZHS
Units
4 mA Std. 0.55 10.50 0.04 1.23 0.39 10.69 10.50 2.54 2.07 12.75 12.56 ns
–1 0.46 8.75 0.03 1.03 0.32 8.91 8.75 2.12 1.73 10.62 10.47 ns
8 mA Std. 0.55 7.61 0.04 1.23 0.39 7.46 7.19 2.81 2.66 9.52 9.25 ns
–1 0.46 6.34 0.03 1.03 0.32 6.22 5.99 2.34 2.22 7.93 7.71 ns
12 mA Std. 0.60 5.92 0.04 1.23 0.39 5.79 5.45 3.04 3.06 7.85 7.51 ns
–1 0.50 4.93 0.03 1.03 0.32 4.83 4.54 2.53 2.55 6.54 6.26 ns
16 mA Std. 0.60 5.53 0.04 1.23 0.39 5.40 5.09 3.09 3.16 7.46 7.14 ns
–1 0.50 4.61 0.03 1.03 0.32 4.50 4.24 2.58 2.64 6.22 5.95 ns
24 mA Std. 0.60 5.18 0.04 1.23 0.39 5.28 5.14 3.27 3.64 7.34 7.20 ns
–1 0.50 4.32 0.03 1.03 0.32 4.40 4.29 2.72 3.03 6.11 6.00 ns
Note: For specific junction temperature and voltage supply levels, refer to Table 2-7 on page 2-9 for derating values.
Table 2-46 • 2.5 V LVCMOS High Slew
Worst Commercial-Case Conditions: T
J
= 85°C, Worst-Case VCC = 1.425 V,
Worst-Case VCCxxxxIOBx = 3.0 V
Applicable to MSS I/O Banks
Drive
Strength
Speed
Grade t
DOUT
t
DP
t
DIN
t
PY
t
PYS
t
EOUT
t
ZL
t
ZH
t
LZ
t
HZ
Units
8 mA Std. 0.22 2.35 0.09 1.18 1.39 0.22 2.40 2.18 2.19 2.32 ns
–1 0.18 1.96 0.07 0.99 1.16 0.18 2.00 1.82 1.82 1.93 ns
Notes:
1. Software default selection highlighted in gray.
2. For specific junction temperature and voltage supply levels, refer to Table 2-7 on page 2-9 for derating values.