SmartFusion Customizable System-on-Chip (cSoC)
Revision 10 2-91
Inter-Integrated Circuit (I
2
C) Characteristics
This section describes the DC and switching of the I
C interface. Unless otherwise noted, all output
characteristics given are for a 100 pF load on the pins. For timing parameter definitions, refer to Figure 2-
49 on page 2-92.
Table 2-102 • I
2
C Characteristics
Commercial Case Conditions: T
J
= 85ºC, V
DD
= 1.425 V, –1 Speed Grade
Parameter Definition Condition Value Unit
V
IL
Minimum input low voltage – SeeTable 2-36 on
page 2-30
–
Maximum input low voltage – See Ta b le 2- 36 –
V
IH
Minimum input high voltage – See Ta ble 2- 3 6 –
Maximum input high voltage – See Tab le 2- 36 –
V
OL
Maximum output voltage low I
OL
=8mA See Ta b le 2 -36 –
I
IL
Input current high – See Ta b le 2 -36 –
I
IH
Input current low – See Ta b le 2 - 36 –
V
hyst
Hysteresis of Schmitt trigger
inputs
– See Table 2-33 on
page 2-29
V
T
FALL
Fall time
2
VIHmin to VILMax, C
load
= 400 pF 15.0 ns
VIHmin to VILMax, C
load
= 100 pF 4.0 ns
T
RISE
Rise time
2
VILMax to VIHmin, C
load
= 400pF 19.5 ns
VILMax to VIHmin, C
load
= 100pF 5.2 ns
Cin Pin capacitance VIN = 0, f = 1.0 MHz 8.0 pF
R
pull-up
Output buffer maximum pull-
down Resistance
1
–50
R
pull-down
Output buffer maximum pull-up
Resistance
1
– 150
D
max
Maximum data rate Fast mode 400 Kbps
t
LOW
Low period of I2C_x_SCL
3
– 1 pclk cycles
t
HIGH
High period of I2C_x_SCL
3
– 1 pclk cycles
t
HD;STA
START hold time
3
– 1 pclk cycles
t
SU;STA
START setup time
3
– 1 pclk cycles
t
HD;DAT
DATA hold time
3
– 1 pclk cycles
t
SU;DAT
DATA setup time
3
– 1 pclk cycles
Notes:
1. These maximum values are provided for information only. Minimum output buffer resistance values depend on
VCCxxxxIOBx, drive strength selection, temperature, and process. For board design considerations and detailed output
buffer resistances, use the corresponding IBIS models located on the SoC Products Group website at
http://www.microsemi.com/soc/download/ibis/default.aspx.
2. These values are provided for a load of 100 pF and 400 pF. For board design considerations and detailed output buffer
resistances, use the corresponding IBIS models located on the SoC Products Group website at
http://www.microsemi.com/soc/download/ibis/default.aspx.
3. For allowable Pclk configurations, refer to the Inter-Integrated Circuit (I
2
C) Peripherals section in the SmartFusion
Microcontroller Subsystem User’s Guide.
