SmartFusion Customizable System-on-Chip (cSoC)
Revision 10 2-39
3.3 V PCI, 3.3 V PCI-X
Peripheral Component Interface for 3.3 V standard specifies support for 33 MHz and 66 MHz PCI Bus
applications.
AC loadings are defined per the PCI/PCI-X specifications for the datapath; SoC Products Group loadings
for enable path characterization are described in Figure 2-10.
AC loadings are defined per PCI/PCI-X specifications for the datapath; SoC Products Group loading for
tristate is described in Table 2-60.
Timing Characteristics
Table 2-59 • Minimum and Maximum DC Input and Output Levels
3.3 V PCI/PCI-X VIL VIH VOL VOH I
OL
I
OH
I
OSL
I
OSH
I
IL
I
IH
Drive Strength
Min.
V
Max.
V
Min.
V
Max.
V
Max.
V
Min.
VmAmA
Max.
mA
1
Max.
mA
1
µA
2
µA
2
Per PCI specification Per PCI curves 15 15
Notes:
1. Currents are measured at high temperature (100°C junction temperature) and maximum voltage.
2. Currents are measured at 85°C junction temperature.
Figure 2-10 • AC Loading
Test Point
Enable Path
R to VCCXXXXIOBX for t
LZ
/ t
ZL
/ t
ZLS
10 pF for t
ZH
/ t
ZHS
/ t
ZL
/ t
ZLS
10 pF for t
HZ
/ t
LZ
R to GND for t
HZ
/ t
ZH
/ t
ZHS
R = 1 k
Test Point
Datapath
R = 25
R to VCCXXXXIOBX for t
DP
(F)
R to GND for t
DP
(R)
Table 2-60 • AC Waveforms, Measuring Points, and Capacitive Loads
Input Low (V) Input High (V) Measuring Point* (V) V
REF
(typ.) (V) C
LOAD
(pF)
0 3.3 0.285 * VCCxxxxIOBx for t
DP(R)
0.615 * VCCxxxxIOBx for t
DP(F)
–10
* Measuring point = V
trip.
See Table 2-22 on page 2-24 for a complete table of trip points.
Table 2-61 • 3.3 V PCI
Worst Commercial-Case Conditions: T
J
= 85°C, Worst-Case VCC = 1.425 V,
Worst-Case VCCxxxxIOBx = 3.0 V
Applicable to FPGA I/O Banks, I/O Assigned to EMC I/O Pins
Speed Grade t
DOUT
t
DP
t
DIN
t
PY
t
EOUT
t
ZL
t
ZH
t
LZ
t
HZ
t
ZLS
t
ZHS
Units
Std. 0.60 2.54 0.04 0.82 0.39 2.58 1.88 3.06 3.39 4.64 3.94 ns
–1 0.50 2.11 0.03 0.68 0.32 2.15 1.57 2.55 2.82 3.87 3.28 ns
Note: For specific junction temperature and voltage supply levels, refer to Table 2-7 on page 2-9 for derating values.
Table 2-62 • 3.3 V PCI-X
Worst Commercial-Case Conditions: T
J
= 85°C, Worst-Case VCC = 1.425 V,
Worst-Case VCCxxxxIOBx = 3.0 V
Applicable to FPGA I/O Banks, I/O Assigned to EMC I/O Pins
Speed Grade t
DOUT
t
DP
t
DIN
t
PY
t
EOUT
t
ZL
t
ZH
t
LZ
t
HZ
t
ZLS
t
ZHS
Units
Std. 0.60 2.54 0.04 0.77 0.39 2.58 1.88 3.06 3.39 4.64 3.94 ns
–1 0.50 2.11 0.03 0.64 0.32 2.15 1.57 2.55 2.82 3.87 3.28 ns
Note: For specific junction temperature and voltage supply levels, refer to Table 2-7 on page 2-9 for derating values.