SmartFusion DC and Switching Characteristics
2-92 Revision 10
t
SU;STO
STOP setup time
3
– 1 pclk cycles
t
FILT
Maximum spike width filtered – 50 ns
Figure 2-49 • I2C Timing Parameter Definition
Table 2-102 • I
2
C Characteristics
Commercial Case Conditions: T
J
= 85ºC, V
DD
= 1.425 V, –1 Speed Grade (continued)
Parameter Definition Condition Value Unit
Notes:
1. These maximum values are provided for information only. Minimum output buffer resistance values depend on
VCCxxxxIOBx, drive strength selection, temperature, and process. For board design considerations and detailed output
buffer resistances, use the corresponding IBIS models located on the SoC Products Group website at
http://www.microsemi.com/soc/download/ibis/default.aspx.
2. These values are provided for a load of 100 pF and 400 pF. For board design considerations and detailed output buffer
resistances, use the corresponding IBIS models located on the SoC Products Group website at
http://www.microsemi.com/soc/download/ibis/default.aspx.
3. For allowable Pclk configurations, refer to the Inter-Integrated Circuit (I
2
C) Peripherals section in the SmartFusion
Microcontroller Subsystem User’s Guide.
SCL
T
RISE
T
FALL
t
LOW
t
HD;STA
SDA
t
HIGH
t
HD;DAT
t
SU;DAT
t
SU;STO
t
SU;STA
S
P