SmartFusion Customizable System-on-Chip (cSoC)
Revision 10 2-51
DDR Module Specifications
Input DDR Module
Figure 2-19 • Input DDR Timing Model
Table 2-74 • Parameter Definitions
Parameter Name Parameter Definition Measuring Nodes (from, to)
t
DDRICLKQ1
Clock-to-Out Out_QR B, D
t
DDRICLKQ2
Clock-to-Out Out_QF B, E
t
DDRISUD
Data Setup Time of DDR input A, B
t
DDRIHD
Data Hold Time of DDR input A, B
t
DDRICLR2Q1
Clear-to-Out Out_QR C, D
t
DDRICLR2Q2
Clear-to-Out Out_QF C, E
t
DDRIREMCLR
Clear Removal C, B
t
DDRIRECCLR
Clear Recovery C, B
Input DDR
Data
CLK
CLKBUF
INBUF
Out_QF
(to core)
FF2
FF1
INBUF
CLR
DDR_IN
E
A
B
C
D
Out_QR
(to core)