SmartFusion Customizable System-on-Chip (cSoC)
Revision 10 2-41
Timing Characteristics
Table 2-63 • LVDS Minimum and Maximum DC Input and Output Levels
DC Parameter Description Min. Typ. Max. Units
VCCFPGAIOBx Supply voltage 2.375 2.5 2.625 V
VOL Output low voltage 0.9 1.075 1.25 V
VOH Output high voltage 1.25 1.425 1.6 V
I
OL
1
Output lower current 0.65 0.91 1.16 mA
I
OH
1
Output high current 0.65 0.91 1.16 mA
VI Input voltage 0 2.925 V
I
IH
2
Input high leakage current 15 µA
I
IL
2
Input low leakage current 15 µA
V
ODIFF
Differential output voltage 250 350 450 mV
V
OCM
Output common mode voltage 1.125 1.25 1.375 V
V
ICM
Input common mode voltage 0.05 1.25 2.35 V
V
IDIFF
Input differential voltage 100 350 mV
Notes:
1. I
OL
/I
OH
defined by V
ODIFF
/(resistor network).
2. Currents are measured at 85°C junction temperature.
Table 2-64 • AC Waveforms, Measuring Points, and Capacitive Loads
Input Low (V) Input High (V) Measuring Point* (V) V
REF
(typ.) (V)
1.075 1.325 Cross point –
* Measuring point = V
trip.
See Table 2-22 on page 2-24 for a complete table of trip points.
Table 2-65 • LVDS
Worst Commercial-Case Conditions: T
J
= 85°C, Worst-Case VCC = 1.425 V,
Worst-Case VCCFPGAIOBx = 2.3 V
Applicable to FPGA I/O Banks, I/O Assigned to EMC I/O Pins
Speed Grade t
DOUT
t
DP
t
DIN
t
PY
Units
Std. 0.60 1.83 0.04 1.87 ns
–1 0.50 1.53 0.03 1.55 ns
Notes:
1. For the derating values at specific junction temperature and voltage supply levels, refer to Table 2-7 on page 2-9 for
derating values.
2. The above mentioned timing parameters correspond to 24mA drive strength.