SmartFusion DC and Switching Characteristics
2-32 Revision 10
2.5 V LVCMOS
Low-Voltage CMOS for 2.5 V is an extension of the LVCMOS standard (JESD8-5) used for general-
purpose 2.5 V applications.
Table 2-41 • Minimum and Maximum DC Input and Output Levels
Applicable to FPGA I/O Banks
2.5 V LVCMOS VIL VIH VOL VOH I
OL
I
OH
I
OSL
I
OSH
I
IL
I
IH
Drive Strength
Min.
V
Max.
V
Min.
V
Max.
V
Max.
V
Min.
VmAmA
Max.
mA
1
Max.
mA
1
µA
2
µA
2
2 mA –0.3 0.7 1.7 2.7 0.7 1.7 2 2 18 16 15 15
4 mA –0.3 0.7 1.7 2.7 0.7 1.7 4 4 18 16 15 15
6 mA –0.3 0.7 1.7 2.7 0.7 1.7 6 6 37 32 15 15
8 mA –0.3 0.7 1.7 2.7 0.7 1.7 8 8 37 32 15 15
12 mA –0.3 0.7 1.7 2.7 0.7 1.7 12 12 74 65 15 15
16 mA –0.3 0.7 1.7 2.7 0.7 1.7 16 16 87 83 15 15
24 mA –0.3 0.7 1.7 2.7 0.7 1.7 24 24 124 169 15 15
Notes:
1. Currents are measured at high temperature (100°C junction temperature) and maximum voltage.
2. Currents are measured at 85°C junction temperature.
3. Software default selection highlighted in gray.
Table 2-42 • Minimum and Maximum DC Input and Output Levels
Applicable to MSS I/O Banks
2.5 V LVCMOS VIL V
IH
VOL VOH I
OL
I
OH
I
OSL
I
OSH
I
IL
I
IH
Drive Strength
Min.
V
Max.
V
Min.
V
Max.
V
Max.
V
Min.
VmAmA
Max.
mA
1
Max.,
mA
1
µA
2
µA
2
8 mA –0.3 0.7 1.7 3.6 0.7 1.7 8 8 37 32 15 15
Notes:
1. Currents are measured at high temperature (100°C junction temperature) and maximum voltage.
2. Currents are measured at 85°C junction temperature.
3. Software default selection highlighted in gray.
Figure 2-7 • AC Loading
Table 2-43 • AC Waveforms, Measuring Points, and Capacitive Loads
Input Low (V) Input High (V) Measuring Point* (V) V
REF
(typ.) (V) C
LOAD
(pF)
0 2.5 1.2 – 35
* Measuring point = V
trip.
See Table 2-22 on page 2-24 for a complete table of trip points.
Test Point
Test Point
Enable Path
Datapath
35 pF
R = 1 K
R to GND for t
HZ
/ t
ZH
/ t
ZHS
R to VCCxxxxIOBx for t
LZ
/ t
ZL
/ t
ZLS
35 pF for t
ZH
/ t
ZHS
/ t
ZL
/ t
ZLS
35 pF for t
HZ
/ t
LZ