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A2F060M3C-CS256YES

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型号: A2F060M3C-CS256YES
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  • A2F060M3C-CS256YES PDF文件
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功能描述: SmartFusion Customizable System-on-Chip (cSoC)
PDF文件大小: 11779.94 Kbytes
PDF页数: 共192页
制造商: MICROSEMI[Microsemi Corporation]
制造商LOGO: MICROSEMI[Microsemi Corporation] LOGO
制造商网址: http://www.microsemi.com
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120%
SmartFusion DC and Switching Characteristics
2-14 Revision 10
Power Calculation Methodology
This section describes a simplified method to estimate power consumption of an application. For more
accurate and detailed power estimations, use the SmartPower tool in the Libero SoC software.
The power calculation methodology described below uses the following variables:
The number of PLLs/CCCs as well as the number and the frequency of each output clock
generated
The number of combinatorial and sequential cells used in the design
The internal clock frequencies
The number and the standard of I/O pins used in the design
The number of RAM blocks used in the design
The number of eNVM blocks used in the design
The analog block used in the design, including the temperature monitor, current monitor, ABPS,
sigma-delta DAC, comparator, low power crystal oscillator, RC oscillator and the main crystal
oscillator
Toggle rates of I/O pins as well as VersaTiles—guidelines are provided in Table 2-17 on
page 2-18.
Enable rates of output buffers—guidelines are provided for typical applications in Table 2-18 on
page 2-18.
Read rate and write rate to the memory—guidelines are provided for typical applications in
Table 2-18 on page 2-18.
Read rate to the eNVM blocks
The calculation should be repeated for each clock domain defined in the design.
Methodology
Total Power Consumption—P
TOTAL
SoC Mode, Standby Mode, and Time Keeping Mode.
P
TOTAL
= P
STAT
+ P
DYN
P
STAT
is the total static power consumption.
P
DYN
is the total dynamic power consumption.
Total Static Power Consumption—P
STAT
SoC Mode
P
STAT
= P
DC1
+ (N
INPUTS
* P
DC7
) + (N
OUTPUTS
* P
DC8
) + (N
PLLS
* P
DC9
)
N
INPUTS
is the number of I/O input buffers used in the design.
N
OUTPUTS
is the number of I/O output buffers used in the design.
N
PLLS
is the number of PLLs available in the device.
Standby Mode
P
STAT
= P
DC2
Time Keeping Mode
P
STAT
= P
DC3
Total Dynamic Power Consumption—P
DYN
SoC Mode
P
DYN
= P
CLOCK
+ P
S-CELL
+ P
C-CELL
+ P
NET
+ P
INPUTS
+ P
OUTPUTS
+ P
MEMORY
+ P
PLL
+ P
eNVM
+
P
XTL-OSC
+ P
RC-OSC
+ P
AB
+ P
LPXTAL-OSC
+ P
MSS
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